您的位置：维库电子市场网 > Datasheet > HD74LV595AFPEL

HD74LV595AFPEL Datasheet

  • HD74LV595AFPEL

  • 8-bit Shift Registers with 3-state Outputs

  • 109.97KB

  • 14页

  • RENESAS

阅览下载 纠错 0

扫码查看芯片数据手册

上传产品规格书

PDF预览

HD74LV595A
8-bit Shift Registers with 3-state Outputs
REJ03D0335鈥?200Z
(Previous ADE-205-281 (Z))
Rev.2.00
Jun. 28, 2004
Description
This device each contains an 8-bit serial-in, parallel-out shift registers that feeds an 8-bit D-type storage register. The
storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage
register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading.
Both the shift register and the storage register clocks are positive-edge triggered. If the user wishes to connect both
clocks together, the shift register state will always be one clock pulse ahead of the storage register. Low-voltage and
high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power
consumption extends the battery life.
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25掳C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25掳C)
Output current 卤6 mA (@V
CC
= 3.0 V to 3.6 V), 卤12 mA (@V
CC
= 4.5 V to 5.5 V)
Ordering Information
Package Type
SOP鈥?6 pin (JEITA)
SOP鈥?6 pin (JEDEC)
TSSOP鈥?6 pin
Package Code
FP鈥?6DAV
FP鈥?6DNV
TTP鈥?6DAV
Package
Abbreviation
FP
RP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Part Name
HD74LV595AFPEL
HD74LV595ARPEL
HD74LV595ATELL
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
SER
X
X
X
L
H
X
X
X
Note: H:
L:
X:
鈫?
鈫?
SRCLK
SRCLR
X
X
X
X
X
L
鈫?/div>
H
鈫?/div>
H
鈫?/div>
H
X
X
X
X
High level
Low level
Immaterial
Low to high transition
High to low transition
RCLK
X
X
X
X
X
X
鈫?/div>
鈫?/div>
G
H
L
X
X
X
X
X
X
Function
Force outputs into high-impedance state
Enable parallel output
Reset shift register
Shift data into shift register
Shift data into shift register
Shift register remains unchanged
Transfer shift register contents to latch register
Latch register remains unchanged
Rev.2.00 Jun. 28, 2004 page 1 of 13

HD74LV595AFPEL相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

©2025 维库电子市场网（www.dzsc.com）　备案号：浙B2-20050339-1 经营许可证：浙B2-20210386版权声明
买家服务热线：0571-85317607 | 买家服务部QQ： QQ:1609526468
卖家服务热线：0571-85317607 | 卖家服务部QQ： QQ:331652727

扫码下载APP，
一键连接广大的电子世界。

在线人工客服

买家服务：
卖家服务：
技术客服：

0571-85317607

网站技术支持

13606545031

客服在线时间周一至周五
9:00-17:30

关注官方微信号，
第一时间获取资讯。

建议反馈
返回顶部

建议反馈

联系人：

联系方式：

按住滑块，拖拽到最右边
>>
感谢您向阿库提出的宝贵意见，您的参与是维库提升服务的动力！意见一经采纳，将有感恩红包奉上哦！

PDF纠错X

投诉电话：0571-85317607 投诉QQ：

如选匿名将无法为您反馈投诉结果，建议实名投诉！