ICS301MT Datasheet

  • ICS301MT

  • QTClock⑩ Quick Turn Clock Synthesizer

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  • ICS

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ICS300/ICS301/ICS302
QTClock鈩?Quick Turn Clock Synthesizer
Description
The ICS300 and ICS301 QTClocks鈩?generate a
high quality, high frequency clock output and a
reference from a low frequency crystal or clock
input. They are designed to replace crystals and
crystal oscillators in most electronic systems. The
ICS302 can accept a higher frequency clock input
to generate up to 200 MHz. The devices contain a
One Time Programmable (OTP) ROM which is
factory programmed with the PLL divider values
to output a broad range of frequencies, from 6 to
200 MHz, allowing customer requests for different
frequencies to be shipped in 1-3 days. Using
Phase-Locked-Loop (PLL) techniques, the devices
run from a standard fundamental mode,
inexpensive crystal, or clock. They are smaller and
less expensive than one oscillator.
Features
鈥?Packaged as 8 pin SOIC
鈥?Quick turn frequency programming allows
samples in one to three days
鈥?Replaces nearly any crystal or oscillator
鈥?ICS300 produces up to 100 MHz at 3.3V,
ICS301 produces up to 200 MHz at 3.3V
ICS302 accepts up to 125 MHz clock input
鈥?Easy to cascade with ICS5xx series
鈥?Input crystal frequency of 5 - 27 MHz
鈥?Input clock frequency of 2 - 125 MHz
鈥?Low jitter - 50 ps one sigma
鈥?Compatible with all popular CPUs
鈥?Duty cycle of 45/55
鈥?Operating voltages of 3.0 to 5.5V
鈥?Full CMOS level outputs with 25mA drive
capability at TTL levels
鈥?Tri-state output + PLL power down pin
鈥?Advanced, low power CMOS process
Block Diagram
VDD GND
Crystal
or clock
input
OTP
ROM
with PLL
Divider
Values
X1/ICLK
PLL
Clock
Synthesis
and Control
Circuitry
Output
Buffer
CLK
Crystal
Oscillator
X2
Divide
Logic and
Output
Buffer
REF
PDTS (both outputs and PLL)
MDS 300QT E
1
Revision 111000
Integrated Circuit Systems, Inc. 鈥?525 Race Street 鈥?San Jose 鈥A鈥?5126鈥?408) 295-9800tel鈥?www.icst.com

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