鈥?Wide input gating (36 input logic blocks) for fast
counters, state machines and address decoders
鈻?/div>
Zero Power (ispMACH 4000Z) and Low
Power (ispMACH 4000V/B/C)
鈥?Typical static current 10碌A (4032Z)
鈥?Typical static current 1.8mA (4000C)
鈥?1.8V core low dynamic power
Table 1. ispMACH 4000V/B/C Family Selection Guide
ispMACH
4032V/B/C
Macrocells
User I/O Options
t
PD
(ns)
t
S
(ns)
t
CO
(ns)
f
MAX
(MHz)
Supply Voltages (V)
Pins/Package
32
30/32
2.5
1.8
2.2
400
3.3/2.5/1.8V
44 TQFP
48 TQFP
ispMACH
4064V/B/C
64
30/32/64
2.5
1.8
2.2
400
3.3/2.5/1.8V
44 TQFP
48 TQFP
100 TQFP
ispMACH
4128V/B/C
128
64/92/96
2.7
1.8
2.7
333
3.3/2.5/1.8V
ispMACH
4256V/B/C
256
64/96/128/160
3.0
2.0
2.7
322
3.3/2.5/1.8V
ispMACH
4384V/B/C
384
128/192
3.5
2.0
2.7
322
3.3/2.5/1.8V
ispMACH
4512V/B/C
512
128/208
3.5
2.0
2.7
322
3.3/2.5/1.8V
100 TQFP
128 TQFP
144 TQFP
1
100 TQFP
144 TQFP
1
176 TQFP
256 fpBGA
2
176 TQFP
256 fpBGA
176 TQFP
256 fpBGA
1. 3.3V (4000V) only.
2. 128-I/O and 160-I/O con铿乬urations.
Note: ispMACH 4032Z information is preliminary. ispMACH 4064Z/4128Z information is advance.
漏 2003 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The speci铿乧ations and information herein are subject to change without notice.
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