LS373 Datasheet

IC型号：
LS373
PDF描述：
Texas Instruments [OCTAL D-TYPE TRANSPARENT LATCHES AND EDG...
文件大小：
694.69KB
芯片厂家：
TI

阅览下载纠错 0

扫码查看芯片数据手册

上传产品规格书

PDF预览

SN54LS373, SN54LS374, SN54S373, SN54S374,

SN74LS373, SN74LS374, SN74S373, SN74S374

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

SDLS165B 鈥?OCTOBER 1975 鈥?REVISED AUGUST 2002

Choice of Eight Latches or Eight D-Type

Flip-Flops in a Single Package

3-State Bus-Driving Outputs

Full Parallel Access for Loading

Buffered Control Inputs

Clock-Enable Input Has Hysteresis to

Improve Noise Rejection (鈥橲373 and 鈥橲374)

P-N-P Inputs Reduce DC Loading on Data

Lines (鈥橲373 and 鈥橲374)

SN54LS373, SN54LS374, SN54S373,

SN54S374 . . . J OR W PACKAGE

SN74LS373, SN74S374 . . . DW, N, OR NS PACKAGE

SN74LS374 . . . DB, DW, N, OR NS PACKAGE

SN74S373 . . . DW OR N PACKAGE

(TOP VIEW)

description

These 8-bit registers feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. The

high-impedance

3-state

and

increased

high-logic-level drive provide these registers with

the capability of being connected directly to and

driving the bus lines in a bus-organized system

without need for interface or pullup components.

These devices are particularly attractive for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

The eight latches of the 鈥橪S373 and 鈥橲373 are

transparent D-type latches, meaning that while

the enable (C or CLK) input is high, the Q outputs

follow the data (D) inputs. When C or CLK is taken

low, the output is latched at the level of the data

that was set up.

The eight flip-flops of the 鈥橪S374 and 鈥橲374 are

edge-triggered D-type flip-flops. On the positive

transition of the clock, the Q outputs are set to the

logic states that were set up at the D inputs.

GND

鈥?/div>

鈥?C for 鈥橪S373 and 鈥橲373; CLK for 鈥橪S374 and 鈥橲374.

SN54LS373, SN54LS374, SN54S373,

SN54S374 . . . FK PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

鈥?C for 鈥橪S373 and 鈥橲373; CLK for 鈥橪S374 and 鈥橲374.

铮?/div>

2002, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Schmitt-trigger buffered inputs at the enable/clock lines of the 鈥橲373 and 鈥橲374 devices simplify system design

as ac and dc noise rejection is improved by typically 400 mV due to the input hysteresis. A buffered

output-control (OC) input can be used to place the eight outputs in either a normal logic state (high or low logic

levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly.

OC does not affect the internal operation of the latches or flip-flops. That is, the old data can be retained or new

data can be entered, even while the outputs are off.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303

鈥?/div>

DALLAS, TEXAS 75265

GND

C鈥?/div>

LS373 PDF文件相关型号

LS374

LS373相关型号PDF文件下载

型号

版本

描述

厂商

下载
LS373

英文版

Texas Instruments [OCTAL D-TYPE TRANSPARENT LATCHES AND EDG...

TI

LS373
LS374

英文版

Texas Instruments [OCTAL D-TYPE TRANSPARENT LATCHES AND EDG...

TI

LS374
LS374A

英文版

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLO...

TI

LS374A

LS373 Datasheet

PDF预览

LS373 PDF文件相关型号

LS373相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

LS373 Datasheet

PDF预览

LS373 PDF文件相关型号

LS373相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

建议反馈

PDF纠错X