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M74HCT374RM13TR Datasheet

  • M74HCT374RM13TR

  • IC FLIP/FLOP OCTAL D-TYPE 20SOIC

  • 231.50KB

  • 11页

  • STMicroelectronics   STMicroelectronics

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M74HCT374
OCTAL D-TYPE FLIP FLOP
WITH 3 STATE OUTPUT NON INVERTING
s
s
s
s
s
s
HIGH SPEED:
f
MAX
= 50 MHz (TYP.) at V
CC
= 4.5V
LOW POWER DISSIPATION:
I
CC
= 4碌A(MAX.) at T
A
=25掳C
COMPATIBLE WITH TTL OUTPUTS :
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 6mA (MIN)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 374
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
M74HCT374B1R
M74HCT374M1R
T&R
M74HCT374RM13TR
M74HCT374TTR
DESCRIPTION
The M74HCT374 is an high speed CMOS OCTAL
D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS
NON INVERTING fabricated with silicon gate
C
2
MOS technology.
This 8 bit D-TYPE FLIP FLOP is controlled by a
clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to the logic state that were
setup at the D inputs.
While the OE input is at low level, the eight outputs
will be in a normal logic state (high or low logic
level) and while OE is at high level the outputs will
be in a high impedance state.
The output control does not affect the internal
operation of flip-flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
The M74HCT374 is designed to directly interface
HSC
2
MOS systems with TTL and NMOS
components.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/11

M74HCT374RM13TR 产品属性

  • M74HCT374 View All Specifications

  • 1,000

  • 集成电路 (IC)

  • 逻辑 - 触发器

  • 74HCT

  • 标准

  • D 型总线

  • 三态非反相

  • 1

  • 8

  • 50MHz

  • 25ns

  • 正边沿

  • 6mA，6mA

  • 4.5 V ~ 5.5 V

  • -55°C ~ 125°C

  • 表面贴装

  • 20-SOIC（0.295"，7.50mm 宽）

  • 带卷 (TR)

  • 497-1912-2

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