19-2409; Rev 1; 9/02
Dual ECL and Dual/Quad PECL, 500ps,
Ultra-High-Speed Comparators
General Description
The MAX9600/MAX9601/MAX9602 ultra-high-speed com-
parators feature extremely low propagation delay
(500ps). These dual and quad comparators minimize
propagation delay skew (10ps) and are designed for low
propagation delay dispersion (30ps). These features
make them ideal for applications where high-fidelity track-
ing of narrow pulses and low timing dispersion is critical.
The differential input stage accepts a wide range of signals
in the common-mode range from (V
EE
+ 3V) to (V
CC
- 2V).
The outputs are complementary digital signals, compatible
with ECL and PECL systems, and provide sufficient current
to directly drive transmission lines terminated in 50鈩?
The MAX9600/MAX9601 dual-channel ECL and dual-chan-
nel PECL output comparators incorporate latch enable
(LE_,
LE_),
and hysteresis (HYS_). The complementary
latch-enable control permits tracking, track-hold, or sample-
hold mode of operations. The latch enables can be driven
with standard ECL logic for MAX9600 and PECL logic for
MAX9601. The MAX9602 quad-channel PECL output
comparator is ideal for high-density packaging in limit-
ed board space.
The MAX9600/MAX9601 are available in 20-pin TSSOP
packages, and the MAX9602 is offered in a 24-pin
TSSOP package. The MAX9600/MAX9601/MAX9602
are specified for operation from -40掳C to +85掳C.
o
500ps Propagation Delay
o
30ps Propagation Delay Dispersion
o
4Gbps Tracking Frequency
o
-2.2V to +3V Input Range with +5V/-5.2V Supplies
o
-1.2V to +4V Input Range with +6V/-4.2V Supplies
o
Differential ECL Outputs (MAX9600)
o
Differential PECL Outputs (MAX9601/MAX9602)
o
Latch Enable (MAX9600/MAX9601)
o
Adjustable Hysteresis (MAX9600/MAX9601)
Features
MAX9600/MAX9601/MAX9602
Ordering Information
PART
MAX9600EUP
MAX9601EUP
MAX9602EUG
TEMP RANGE
-40掳C to +85掳C
-40掳C to +85掳C
-40掳C to +85掳C
PIN-PACKAGE
20 TSSOP
20 TSSOP
24 TSSOP
Selector Guide
PART
MAX9600EUP
PIN-PACKAGE
20 TSSOP
SELECTION
Dual ECL Output
Comparator with Latch
Enable and Hysteresis
Dual PECL Output
Comparator with Latch
Enable and Hysteresis
Quad PECL Output
Comparator
Applications
VLSI and High-Speed Memory ATE
High-Speed Instrumentation
Scope/Logic Analyzer Front Ends
High-Speed Triggering
Threshold and Peak Detection
Line Receiving/Signal Restoration
MAX9602EUG
24 TSSOP
MAX9601EUP
20 TSSOP
Pin Configurations appear at end of data sheet.
Functional Diagrams
V
CC
V
EE
GND
V
CC
V
EE
V
CCO_
V
CC
V
EE
V
CCO_
IN_+
1/2 MAX9600
Q_
ECL OUTPUT
Q_
R
L
R
L
IN_+
1/2 MAX9601
Q_
PECL OUTPUT
Q_
R
L
R
L
IN_+
1/4 MAX9602
Q_
PECL OUTPUT
Q_
R
L
R
L
IN_-
HYS_
R
HYS_
LE_ LE_
IN_-
HYS_
R
HYS_
LE_ LE_
IN_-
V
T
= -2V
V
T
= V
CCO_
- 2V
V
T
= V
CCO_
- 2V
THE OPEN-EMITTER OUTPUTS REQUIRE EXTERNAL PULLDOWN RESISTORS (R
L
). USE RESISTORS IN THE RANGE OF 50鈩?TO 75鈩?CONNECTED TO V
T
.
CURRENT-CONTROLLED HYSTERESIS REQUIRES A SINGLE EXTERNAL RESISTOR (R
HYS_
) FROM HYS_ TO GND IN THE RANGE OF 10k鈩?TO 35k鈩?
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim鈥檚 website at www.maxim-ic.com.
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