鈥?/div>
Pb鈭扚ree Packages are Available*
LOGIC DIAGRAM
9
5
6
7
10
11
12
X
Y
16
2
3
4
13
14
15
TRUTH TABLE
Inputs Output
X Y OUT
L L
L
L H
H
H L
L
H H
L
V
CC1
= Pin 1
V
CC2
= Pin 16
V
EE
= Pin 8
OUT
16
1
PDIP鈭?6
P SUFFIX
CASE 648
1
MC10H188P
AWLYYWWG
10H188
ALYWG
SOEIAJ鈭?6
CASE 966
1 20
DIP
PIN ASSIGNMENT
V
CC1
A
OUT
B
OUT
C
OUT
A
IN
B
IN
C
IN
V
EE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC2
F
OUT
E
OUT
D
OUT
F
IN
E
IN
D
IN
COMMON
*For additional marking information, refer to
Application Note AND8002/D.
20 1
PLLC鈭?0
FN SUFFIX
CASE 775
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
10H188G
AWLYYWW
Pin assignment is for Dual鈭抜n鈭扡ine Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2006
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
February, 2006
鈭?/div>
Rev. 7
1
Publication Order Number:
MC10H188/D
1
2
3
4
5
6
