MCP3201 Datasheet_PDF文件下载_芯片资料查询

12-bit resolution

卤1 LSB max DNL

卤1 LSB max INL (MCP3201-B)

卤2 LSB max INL (MCP3201-C)

On-chip sample and hold

SPI

庐

serial interface (modes 0,0 and 1,1)

Single supply operation: 2.7V - 5.5V

100ksps max. sampling rate at V

DD

= 5V

50ksps max. sampling rate at V

DD

= 2.7V

Low power CMOS technology

- 500nA typical standby current, 2碌A max.

- 400碌A max. active current at 5V

鈥?Industrial temp range: -40掳C to +85掳C

鈥?8-pin PDIP, SOIC and TSSOP packages

PACKAGE TYPES

PDIP

V

REF

IN+

IN鈥?/div>

V

SS

1

2

3

4

8

7

6

5

V

DD

CLK

D

OUT

CS/SHDN

MCP3201

SOIC, TSSOP

V

REF

IN+

IN鈥?/div>

V

SS

1

2

3

4

8

7

6

5

MCP3201

V

DD

CLK

D

OUT

CS/SHDN

APPLICATIONS

鈥?/div>

Sensor Interface

Process Control

Data Acquisition

Battery Operated Systems

FUNCTIONAL BLOCK DIAGRAM

V

REF

V

DD

V

SS

DESCRIPTION

The Microchip Technology Inc. MCP3201 is a succes-

sive approximation 12-bit Analog-to-Digital (A/D) Con-

verter with on-board sample and hold circuitry. The

device provides a single pseudo-differential input. Dif-

ferential Nonlinearity (DNL) is specified at 卤1 LSB, and

Integral Nonlinearity (INL) is offered in 卤1 LSB

(MCP3201-B) and 卤2 LSB (MCP3201-C) versions.

Communication with the device is done using a simple

serial interface compatible with the SPI protocol. The

device is capable of sample rates of up to 100ksps at a

clock rate of 1.6MHz. The MCP3201 operates over a

broad voltage range (2.7V - 5.5V). Low current design

permits operation with typical standby and active cur-

rents of only 500nA and 300碌A, respectively. The

device is offered in 8-pin PDIP, TSSOP and 150mil

SOIC packages.

DAC

Comparator

IN+

IN-

Sample

and

Hold

Control Logic

12-Bit SAR

Shift

Register

CS/SHDN

CLK

D

OUT

漏

1999 Microchip Technology Inc.

Preliminary

DS21290B-page 1

型号

版本

描述

厂商

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