March 1997
Micro Linear
ML6622*
High-Speed Data Quantizer
GENERAL DESCRIPTION
The ML6622 high-speed data quantizer (post-amplifier) is
a low noise, wide-band, BiCMOS monolithic IC designed
for high-speed signal recovery applications, such as FDDI,
Fast Ethernet, and ATM. An internal DC restoration
feedback loop nulls any offset voltage produced in the
input stage. The limiting amplifier contributes to a high
level of sensitivity and a minimum of duty cycle
distortion.
The output of the data path is a high-speed comparator
with ECL outputs. An enable pin gates the comparator on
or off in response to the input signal level or a system
control signal.
The Link Detect circuit provides an Assert-Deassert
function with a user-selectable threshold voltage. This
circuit monitors the input signal and provides an ECL High
output within 100ms of signal acquisition and an ECL Low
output within 350ms of signal loss. The ECL discriminator
output can be used to disable the comparator when the
signal is below the user-selected threshold. LINKLED
drives an LED for a visible indication of the link status.
FEATURES
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200 MHz bandwidth
Low noise design
Adjustable Link Detect function
Low power design: 35mA typical
Used with the ML6633 LED driver
APPLICATIONS
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FDDI
Fast Ethernet, 100BASE-FX
ATM (SONET), 155Mbps
Fibre Channel, 133 or 266Mbps
Proprietary high-speed fiber optic data links
*Some Packages Are Obsolete
BLOCK DIAGRAM
V
CC
A
14
V
IN+
13
AMP
V
IN鈥?/div>
12
ECL
CMP
GNDA
11
V
CC
3
GND
6
4 ECL OUT+
5 ECL OUT鈥?/div>
FILTER
1 ENABLE
LINK DETECT
7 LINK+
V
REF
9
REF
THRESH
TIMER
LINK
OUT
8 LINK鈥?/div>
15
CAP
10
THIN
16
2
C
TIME
LINKLED
Micro Linear
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