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MSM80C85ARS数据手册封面

MSM80C85ARS Datasheet

  • MSM80C85ARS

  • IC,MICROPROCESSOR,8-BIT,CMOS,DIP,40PIN,PLASTIC

  • 919.96KB

  • OKI

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E2O0009-27-X2
隆 Semiconductor
MSM80C85AHRS/GS/JS
隆 Semiconductor
8-Bit CMOS MICROPROCESSOR
This version: Jan. 1998
MSM80C85AHRS/GS/JS
Previous version: Aug. 1996
GENRAL DESCRIPTION
The MSM80C85AH is a complete 8-bit parallel; central processor implemented in silicon gate
C-MOS technology and compatible with MSM80C85A.
It is designed with higher processing speed (max.5 MHz) and lower power consumption
compared with MSM80C85A and power down mode is provided, thereby offering a high level
of system integration.
The MSM80C85AH uses a multiplexed address/data bus. The address is split between the 8-
bit address bus and the 8-bit data bus. The on-chip address latch : of a MSM81C55-5 memory
product allows a direct interface with the MSM80C85AH.
FEATURES
鈥?Power down mode (HALT-HOLD)
鈥?Low Power Dissipation: 50mW(Typ)
鈥?Single + 3 to + 6 V Power Supply
鈥?鈥?0 to + 85掳C, Operating Temperature
鈥?Compatible with MSM80C85A
鈥?0.8
ms
instruction Cycle (V
CC
= 5V)
鈥?On-Chip Clock Generator (with External Crystal)
鈥?On-Chip System Controller; Advanced Cycle Status Information Available for Large System
Control
鈥?Bug operation in MSM80C85AH is fixed
鈥?Four Vectored interrupt (One is non-maskable) Plus the 8080A-compatible interrupt.
鈥?Serial, In/Serial Out Port
鈥?Decimal, Binary and Double Precision Arithmetic
鈥?Addressing Capability to 64K Bytes of Memory
鈥?TTL Compatible
鈥?40-pin Plastic DIP(DIP40-P-600-2.54): (Product name: MSM80C85AHRS)
鈥?44-pin Plastic QFJ(QFJ44-P-S650-1.27): (Product name: MSM80C85AHJS)
鈥?44-pin Plastic QFP(QFP44-P-910-0.80-2K): (Product name: MSM80C85AHGS-2K)
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