SN74LV20A Datasheet

  • SN74LV20A

  • Dual 4-Input Positive-NAND Gate

  • 168.00KB

  • 13页

  • TI

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SN54LV20A, SN74LV20A
DUAL 4 INPUT POSITIVE NAND GATE
SCES339E 鈭?SEPTEMBER 2000 鈭?REVISED APRIL 2005
D
2-V to 5.5-V V
CC
Operation
D
Max t
pd
of 6 ns at 5 V
D
Typical V
OLP
(Output Ground Bounce)
D
D
D
D
<0.8 V at V
CC
= 3.3 V, T
A
= 25掳C
Typical V
OHV
(Output V
OH
Undershoot)
>2.3 V at V
CC
= 3.3 V, T
A
= 25掳C
I
off
Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
鈭?2000-V Human-Body Model (A114-A)
鈭?200-V Machine Model (A115-A)
鈭?1000-V Charged-Device Model (C101)
SN54LV20A . . . J OR W PACKAGE
SN74LV20A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
1A
1B
NC
1C
1D
1Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
2D
2C
NC
2B
2A
2Y
SN54LV20A . . . FK PACKAGE
(TOP VIEW)
description/ordering information
These dual 4-input positive-NAND gates are
designed for 2-V to 5.5-V V
CC
operation.
The 鈥橪V20A devices perform the Boolean function
Y = A
鈥?/div>
B
鈥?/div>
C
鈥?/div>
D or Y = A + B + C + D in positive
logic.
These devices are fully specified for
partial-power-down applications using I
off
. The I
off
circuitry disables the outputs, preventing
damaging current backflow through the devices
when they are powered down.
ORDERING INFORMATION
TA
SOIC 鈭?D
SOP 鈭?NS
SSOP 鈭?DB
鈭?0掳C to 85掳C
TSSOP 鈭?PW
TVSOP 鈭?DGV
CDIP 鈭?J
鈭?5 C 125掳C
鈭?5掳C to 125 C
CFP 鈭?W
LCCC 鈭?FK
PACKAGE鈥?/div>
Tube of 50
Reel of 2500
Reel of 2000
Reel of 2000
Tube of 90
Reel of 2000
Reel of 250
Reel of 2000
Tube of 25
Tube of 150
Tube of 55
1B
1A
NC
V
CC
2D
NC
NC
1C
NC
1D
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
2C
NC
NC
NC
2B
NC 鈭?No internal connection
ORDERABLE
PART NUMBER
SN74LV20AD
SN74LV20ADR
SN74LV20ANSR
SN74LV20ADBR
SN74LV20APW
SN74LV20APWR
SN74LV20APWT
SN74LV20ADGVR
SNJ54LV20AJ
SNJ54LV20AW
SNJ54LV20AFK
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
Copyright
铮?/div>
2005, Texas Instruments Incorporated
鈥?/div>
DALLAS, TEXAS 75265
1Y
GND
NC
2Y
2A
TOP-SIDE
MARKING
LV20A
74LV20A
LV20A
LV20A
LV20A
SNJ54LV20AJ
SNJ54LV20AW
SNJ54LV20AFK
1

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