T15M256B-70DG Datasheet

  • T15M256B-70DG

  • 32K X 8 LOW POWER CMOS STATIC RAM

  • 89.86KB

  • 13页

  • TMT

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tm
TE
CH
T15M256B
SRAM
FEATURES
鈥?/div>
High speed access time: 45/50/70/85/100ns
鈥?/div>
Low power supply current :
- Operating :37mA(max)
- Standby : 10uA
鈥?/div>
Power supply : 5V (卤 10%)
鈥?/div>
Fully static operation 鈥?No clock or refreshing
required
鈥?/div>
All inputs and outputs directly LVTTL
compatible
鈥?/div>
Common I/O capability
鈥?/div>
Data retention voltage : 1.5V (min)
鈥?/div>
Available packages :
28-pin DIP(600mil),SOJ, SOP/lead-free, TSOP-I
(8x13.4mm forward type and reverse type).
鈥?/div>
Operating temperature :
-
-
0 ~ +70
掳C
-40 ~ +85
掳C
32K X 8 LOW POWER
CMOS STATIC RAM
GENERAL DESCRIPTION
The T15M256B is a low power CMOS static
RAM. organized as 32,768 x 8 bits that operates
on a single 5-volt power supply. Low operating
and standby current . Data retention is guaranteed
at a power supply voltage as low as 1.5V. This
device is packaged in a standard 28-pin
DIP(600mil), SOJ, SOP, TSOP-I forward and
reverse type.
BLOCK DIAGRAM
Vcc
鈫?/div>
Vss
鈫?/div>
A0
鈫?/div>
A14
鈫?/div>
.
.
.
DECODER
CORE
ARRAY
PART NUMBER EXAMPLES
PART NO.
T15M256B-70N
T15M256B-70J
T15M256B-70D
T15M256B-85P
T15M256B-85R
T15M256B-70DG
T15M256B-70NI
T15M256B-70JI
T15M256B-70DI
T15M256B-85PI
T15M256B-85RI
PACKAGE
CODE
N=DIP
J=SOJ
D=SOP
P= TSOP-I(Forward)
R= TSOP-I(Reverse)
D=SOP/lead-free
N=DIP
J=SOJ
D=SOP
P= TSOP-I(Forward)
R= TSOP-I(Reverse)
-40 ~ +85
掳C
0 ~ +70
掳C
Operating
Temperature
CS
鈫?/div>
OE
鈫?/div>
CONTROL
WE
鈫?/div>
鈫?/div>
I / O1
DATA I/O
鈫?/div>
I / O8
.
.
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 1
Publication Date: OCT. 2003
Revision:C

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