T15V2M16B-70CI Datasheet

  • T15V2M16B-70CI

  • 128K X 16 LOW POWER CMOS STATIC RAM

  • 95.25KB

  • 12页

  • TMT

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tm
TE
CH
T15V2M16B
SRAM
FEATURES
鈥?/div>
Access time : 45/55/70/100 ns
鈥?/div>
Low-power consumption
- Active: 5mA (I
CC1
)
- Stand-by: (CMOS input/output)
Max.. 15 uA for 55/70/100ns
Max.. 40 uA for 45ns
鈥?/div>
Equal access and cycle time
鈥?/div>
Single +2.7V to 3.6V Power Supply
鈥?/div>
TTL compatible , Tri-state output
鈥?/div>
Common I/O capability
鈥?/div>
Automatic power-down when deselected
鈥?/div>
Available in 44-PIN TSOP-II and 48-pin CSP
packages
鈥?/div>
Operating temperature :
-
-
-10 ~ +70
掳C
-40 ~ +85
掳C
128K X 16 LOW POWER
CMOS STATIC RAM
GENERAL DESCRIPTION
The T15V2M16B is a very Low Power CMOS
Static RAM organized as 131,072 words by 16
bits
.
This
device
is
fabricated by high
performance CMOS technology. It can be operated
under wide power supply voltage range from
+2.7V to +3.6V.
The T15V2M16B inputs and three-state
outputs are TTL compatible and allow for direct
interfacing with common system bus structures.
Data retention is guaranteed at a power supply
voltage as low as 2V.
BLOCK DIAGRAM
PART NUMBER EXAMPLES
PART NUMBER
T15V2M16B-55S
T15V2M16B-70C
T15V2M16B-55SI
T15V2M16B-70CI
PACKAGE
TSOP-II
CSP
TSOP-II
CSP
Temperature
-10 ~ +70
掳C
-10 ~ +70
掳C
-40 ~ +85
掳C
-40 ~ +85
掳C
Vcc
Vss
A0
.
.
.
DECODER
CORE
ARRAY
A16
CE
WE
OE
LB
UB
CONTROL
CIRCUIT
DATA I/O
I/O1
.
.
.
I/O16
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 1
Publication Date: NOV. 2002
Revision:A

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