PIC16F818/819
7.0
TIMER1 MODULE
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
In Timer mode, Timer1 increments every instruction
cycle. In Counter mode, it increments on every rising
edge of the external clock input.
Timer1 can be enabled/disabled by setting/clearing
control bit, TMR1ON (T1CON<0>).
Timer1 also has an internal 鈥淩eset input鈥? This Reset
can be generated by the CCP1 module as the special
event trigger (see
Section 9.1 鈥淐apture Mode鈥?.
Register 7-1 shows the Timer1 Control register.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the RB6/T1OSO/T1CKI/PGC and RB7/T1OSI/
PGD pins become inputs. That is, the TRISB<7:6>
value is ignored and these pins read as 鈥?鈥?
Additional information on timer modules is available in
the PICmicro
庐
Mid-Range MCU Family Reference
Manual (DS33023).
The Timer1 module is a 16-bit timer/counter consisting
of two 8-bit registers (TMR1H and TMR1L) which are
readable and writable. The TMR1 register pair
(TMR1H:TMR1L) increments from 0000h to FFFFh
and rolls over to 0000h. The TMR1 interrupt, if enabled,
is generated on overflow which is latched in interrupt
flag bit, TMR1IF (PIR1<0>). This interrupt can be
enabled/disabled by setting/clearing TMR1 Interrupt
Enable bit, TMR1IE (PIE1<0>).
Timer1 can also be used to provide real-time clock
(RTC) functionality to applications with only a minimal
addition of external components and code overhead.
7.1
Timer1 Operation
Timer1 can operate in one of three modes:
鈥?as a timer
鈥?as a synchronous counter
鈥?as an asynchronous counter
REGISTER 7-1:
T1CON: TIMER1 CONTROL REGISTER (ADDRESS 10h)
U-0
鈥?/div>
bit 7
U-0
鈥?/div>
R/W-0
T1CKPS1
R/W-0
T1CKPS0
R/W-0
T1OSCEN
R/W-0
T1SYNC
R/W-0
TMR1CS
R/W-0
TMR1ON
bit 0
bit 7-6
bit 5-4
Unimplemented:
Read as 鈥?鈥?/div>
T1CKPS1:T1CKPS0:
Timer1 Input Clock Prescale Select bits
11
= 1:8 prescale value
10
= 1:4 prescale value
01
= 1:2 prescale value
00
= 1:1 prescale value
T1OSCEN:
Timer1 Oscillator Enable Control bit
1
= Oscillator is enabled
0
= Oscillator is shut-off (the oscillator inverter is turned off to eliminate power drain)
T1SYNC:
Timer1 External Clock Input Synchronization Control bit
TMR1CS =
1:
1
= Do not synchronize external clock input
0
= Synchronize external clock input
TMR1CS =
0:
This bit is ignored. Timer1 uses the internal clock when TMR1CS =
0.
TMR1CS:
Timer1 Clock Source Select bit
1
= External clock from pin RB6/T1OSO/T1CKI/PGC (on the rising edge)
0
= Internal clock (F
OSC
/4)
TMR1ON:
Timer1 On bit
1
= Enables Timer1
0
= Stops Timer1
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
鈥?鈥?= Bit is set
U = Unimplemented bit, read as 鈥?鈥?/div>
鈥?鈥?= Bit is cleared
x = Bit is unknown
bit 3
bit 2
bit 1
bit 0
铮?/div>
2003 Microchip Technology Inc.
Preliminary
DS39598D-page 57
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