您的位置：维库电子市场网 > Datasheet > DS1685-5

DS1685-5 Datasheet

  • DS1685-5

  • 3V/5V实时时钟

  • 764.00KB

  • 39页

  • MAXIM   MAXIM

阅览下载 纠错 0

扫码查看芯片数据手册

上传产品规格书

PDF预览

DS1685/DS1687 3V/5V Real-Time Clocks
NV RAM鈥擱TC
The 242 general-purpose NV RAM bytes are not dedicated to any special function within the DS1685/DS1687.
They can be used by the application program as nonvolatile memory and are fully available during the update
cycle.
The user RAM is divided into two separate memory banks. When the bank 0 is selected, the 14 RTC registers and
114 bytes of user RAM are accessible. When bank 1 is selected, an additional 128 bytes of user RAM are
accessible through the extended RAM address and data registers.
INTERRUPT CONTROL
The DS1685/DS1687 includes six separate, fully automatic sources of interrupt for a processor:
1) Alarm Interrupt
2) Periodic Interrupt
3) Update-Ended Interrupt
4) Wake-Up Interrupt
5) Kickstart Interrupt
6) RAM Clear Interrupt
The conditions that generate each of these independent interrupt conditions are described in detail in other
sections of this text. This section describes the overall control of the interrupts.
The application software can select which interrupts, if any, are to be used. There are a total of 6 bits, including 3
bits in Register B and 3 bits in Extended Register 4B, that enable the interrupts. The extended register locations
are described later. Writing a logic 1 to an interrupt-enable bit permits that interrupt to be initiated when the event
occurs. A logic 0 in the interrupt enable bit prohibits the IRQ pin from being asserted from that interrupt condition. If
an interrupt flag is already set when an interrupt is enabled, IRQ is immediately set at an active level, even though
the event initiating the interrupt condition might have occurred much earlier. As a result, there are cases where the
software should clear these earlier generated interrupts before first enabling new interrupts.
When an interrupt event occurs, the relating flag bit is set to a logic 1 in Register C or in Extended Register 4A.
These flag bits are set regardless of the setting of the corresponding enable bit located either in Register B or in
Extended Register 4B. The flag bits can be used in a polling mode without enabling the corresponding enable bits.
However, care should be taken when using the flag bits of Register C as they are automatically cleared to 0
immediately after they are read. Double latching is implemented on these bits so that set bits remain stable
throughout the read cycle. All bits that were set are cleared when read and new interrupts that are pending during
the read cycle are held until after the cycle is completed. One, two, or three bits can be set when reading Register
C. Each used flag bit should be examined when read to ensure that no interrupts are lost.
The flag bits in Extended Register 4A are not automatically cleared following a read. Instead, each flag bit can be
cleared to 0 only by writing 0 to that bit.
When using the flag bits with fully enabled interrupts, the IRQ line is driven low when an interrupt flag bit is set and
its corresponding enable bit is also set. IRQ is held low as long as at least one of the six possible interrupt sources
has its flag and enable bits both set. The IRQF bit in Register C is a 1 whenever the IRQ pin is being driven low as
a result of one of the six possible active sources. Therefore, determination that the DS1685/DS1687 initiated an
interrupt is accomplished by reading Register C and finding IRQF = 1. IRQF remains set until all enabled interrupt
flag bits are cleared to 0.
14 of 33

DS1685-5 PDF文件相关型号

DS1685E,DS1685E-3

DS1685-5 产品属性

  • Maxim Integrated Products

  • Clock, Calendar, Alarm

  • Multiplexed

  • DW:DM:M:Y, Binary

  • HH:MM:SS, Binary

  • 242 B

  • 5.5 V

  • 4.5 V

  • + 70 C

  • 0 C

  • Through Hole

  • PDIP-24

DS1685-5相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

©2025 维库电子市场网（www.dzsc.com）　备案号：浙B2-20050339-1 经营许可证：浙B2-20210386版权声明
买家服务热线：0571-85317607 | 买家服务部QQ： QQ:1609526468
卖家服务热线：0571-85317607 | 卖家服务部QQ： QQ:331652727

扫码下载APP，
一键连接广大的电子世界。

在线人工客服

买家服务：
卖家服务：
技术客服：

0571-85317607

网站技术支持

13606545031

客服在线时间周一至周五
9:00-17:30

关注官方微信号，
第一时间获取资讯。

建议反馈
返回顶部

建议反馈

联系人：

联系方式：

按住滑块，拖拽到最右边
>>
感谢您向阿库提出的宝贵意见，您的参与是维库提升服务的动力！意见一经采纳，将有感恩红包奉上哦！

PDF纠错X

投诉电话：0571-85317607 投诉QQ：

如选匿名将无法为您反馈投诉结果，建议实名投诉！