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CY7C1464AV33-167BGI Datasheet

  • CY7C1464AV33-167BGI

  • 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL...

  • 772.00KB

  • 0页

  • CYPRESS

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CY7C1460AV33
CY7C1462AV33
CY7C1464AV33
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. 鈥?5掳C to +150掳C
Ambient Temperature with
Power Applied............................................. 鈥?5掳C to +125掳C
Supply Voltage on V
DD
Relative to GND........ 鈥?.5V to +4.6V
Supply Voltage on V
DDQ
Relative to GND ...... 鈥?.5V to +V
DD
DC to Outputs in Tri-State ................... 鈥?.5V to V
DDQ
+ 0.5V
DC Input Voltage....................................鈥?.5V to V
DD
+ 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.................................................... > 200 mA
Operating Range
Range
Commercial
Industrial
Ambient
Temperature
0掳C to +70掳C
鈥?0掳C to +85掳C
V
DD
3.3V
鈥?%/+10%
V
DDQ
2.5V 鈥?% to
V
DD
Electrical Characteristics
Over the Operating Range
[15, 16]
DC Electrical Characteristics
Over the Operating Range
Parameter
V
DD
V
DDQ
V
OH
V
OL
V
IH
V
IL
I
X
Description
Power Supply Voltage
I/O Supply Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH
Voltage
[15]
for 3.3V I/O
for 2.5V I/O
for 3.3V I/O, I
OH
=
鈭?.0
mA
for 2.5V I/O, I
OH
=
鈭?.0
mA
for 3.3V I/O, I
OL
= 8.0 mA
for 2.5V I/O, I
OL
= 1.0 mA
for 3.3V I/O
for 2.5V I/O
Input LOW Voltage
[15]
Input Leakage Current
except ZZ and MODE
for 3.3V I/O
for 2.5V I/O
GND
鈮?/div>
V
I
鈮?/div>
V
DDQ
2.0
1.7
鈥?.3
鈥?.3
鈥?
鈥?0
5
鈥?
30
鈥?
5
475
425
375
225
4-ns cycle, 250 MHz
5-ns cycle, 200 MHz
6-ns cycle, 167 MHz
I
SB1
Automatic CE
Power-down
Current鈥擳TL Inputs
Max. V
DD
, Device Deselected, All speed grades
V
IN
鈮?/div>
V
IH
or V
IN
鈮?/div>
V
IL
, f = f
MAX
=
1/t
CYC
Test Conditions
Min.
3.135
3.135
2.375
2.4
2.0
0.4
0.4
V
DD
+ 0.3V
V
DD
+ 0.3V
0.8
0.7
5
Max.
3.6
V
DD
2.625
Unit
V
V
V
V
V
V
V
V
V
V
V
碌A
碌A
碌A
碌A
碌A
碌A
mA
mA
mA
mA
Input Current of MODE Input = V
SS
Input = V
DD
Input Current of ZZ
I
OZ
I
DD
Input = V
SS
Input = V
DD
Output Leakage Current GND
鈮?/div>
V
I
鈮?/div>
V
DDQ,
Output Disabled
V
DD
Operating Supply
V
DD
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
CYC
I
SB2
Automatic CE
Max. V
DD
, Device Deselected, All speed grades
Power-down
V
IN
鈮?/div>
0.3V or V
IN
> V
DDQ
鈭?/div>
0.3V,
Current鈥擟MOS Inputs f = 0
Automatic CE
Max. V
DD
, Device Deselected, All speed grades
Power-down
V
IN
鈮?/div>
0.3V or V
IN
> V
DDQ
鈭?/div>
0.3V,
Current鈥擟MOS Inputs f = f
MAX
= 1/t
CYC
Automatic CE
Power-down
Current鈥擳TL Inputs
Max. V
DD
, Device Deselected,
V
IN
鈮?/div>
V
IH
or V
IN
鈮?/div>
V
IL
, f = 0
All speed grades
120
mA
I
SB3
200
mA
I
SB4
135
mA
Notes:
15. Overshoot: V
IH
(AC) < V
DD
+1.5V (Pulse width less than t
CYC
/2), undershoot: V
IL
(AC)> 鈥?V (Pulse width less than t
CYC
/2).
16. T
Power-up
: Assumes a linear ramp from 0V to V
DD
(min.) within 200 ms. During this time V
IH
< V
DD
and V
DDQ
< V
DD
.
Document #: 38-05353 Rev. *D
Page 17 of 27
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CY7C1464AV33-167BGI 产品属性

  • 84

  • 集成电路 (IC)

  • 存储器

  • -

  • RAM

  • SRAM - 同步

  • 36M（512K x 72）

  • 167MHz

  • 并联

  • 3.135 V ~ 3.6 V

  • -40°C ~ 85°C

  • 209-BGA

  • 209-FBGA（14x22）

  • 托盘

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