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ADSP-2185L Datasheet

  • ADSP-2185L

  • DSP Microcomputer

  • 532.21KB

  • 32页

  • AD

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ADSP-2185L
ABSOLUTE MAXIMUM RATINGS
*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 鈥?.3 V to +4.6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . 鈥?.5 V to V
DD
+ 0.5 V
Output Voltage Swing . . . . . . . . . . . . . . 鈥?.5 V to V
DD
+ 0.5 V
Operating Temperature Range (Ambient) . . . . 鈥?0掳C to +85掳C
Storage Temperature Range . . . . . . . . . . . . . 鈥?5掳C to +150掳C
Lead Temperature (5 sec) LQFP . . . . . . . . . . . . . . . . . +280掳C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only; functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ESD SENSITIVITY
The ADSP-2185L is an ESD (electrostatic discharge) sensitive device. Electrostatic charges readily
accumulate on the human body and equipment and can discharge without detection. Permanent
damage may occur to devices subjected to high energy electrostatic discharges.
The ADSP-2185L features proprietary ESD protection circuitry to dissipate high energy discharges
(Human Body Model). Per method 3015 of MIL-STD-883, the ADSP-2185L has been classified
as a Class 1 device.
Proper ESD precautions are recommended to avoid performance degradation or loss of function-
ality. Unused devices must be stored in conductive foam or shunts, and the foam should be
discharged to the destination before devices are removed.
WARNING!
ESD SENSITIVE DEVICE
TIMING PARAMETERS
GENERAL NOTES
MEMORY TIMING SPECIFICATIONS
Use the exact timing information given. Do not attempt to de-
rive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results for
an individual device, the values given in this data sheet reflect
statistical variations and worst cases. Consequently, you cannot
meaningfully add up parameters to derive longer times.
TIMING NOTES
The table below shows common memory device specifications
and the corresponding ADSP-2185L timing parameters, for
your convenience.
Memory
Device
Specification
Address Setup to
Write Start
Address Setup to
Write End
Address Hold Time
Data Setup Time
Data Hold Time
OE
to Data Valid
Address Access Time
ADSP-2185L
Timing
Parameter
t
ASW
t
AW
t
WRA
t
DW
t
DH
t
RDD
t
AA
Timing
Parameter
Definition
A0鈥揂13,
xMS
Setup before
WR
Low
A0鈥揂13,
xMS
Setup before
WR
Deasserted
A0鈥揂13,
xMS
Hold before
WR
Low
Data Setup before
WR
High
Data Hold after
WR
High
RD
Low to Data Valid
A0鈥揂13,
xMS
to Data Vali
d
Switching Characteristics
specify how the processor changes its
signals. You have no control over this timing鈥攃ircuitry external
to the processor must be designed for compatibility with these
signal characteristics. Switching characteristics tell you what the
processor will do in a given circumstance. You can also use switch-
ing characteristics to ensure that any timing requirement of a
device connected to the processor (such as memory) is satisfied.
Timing Requirements
apply to signals that are controlled by cir-
cuitry external to the processor, such as the data input for a read
operation. Timing requirements guarantee that the processor
operates correctly with other devices.
xMS
=
PMS, DMS, BMS, CMS, IOMS.
FREQUENCY DEPENDENCY FOR TIMING
SPECIFICATIONS
t
CK
= Instruction Clock Period. t
CKI
= External Clock Period.
t
CK
is defined as 0.5t
CKI
. The ADSP-2185L uses an input clock
with a frequency equal to half the instruction rate: a 26 MHz
input clock (which is equivalent to 38 ns) yields a 19 ns processor
cycle (equivalent to 52 MHz). t
CK
values within the range of
0.5t
CKI
period should be substituted for all relevant timing
parameters to obtain the specification value.
Example: t
CKH
= 0.5t
CK
鈥?7 ns = 0.5 (19 ns) 鈥?7 ns = 2.5 ns
REV. A
鈥?5鈥?/div>

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