PIC16C64X & PIC16C66X
5.4
PORTD and TRISD Registers
(PIC16C661 and PIC16C662 only)
FIGURE 5-8:
Data
bus
WR
PORT
PORTD BLOCK DIAGRAM (IN
I/O PORT MODE)
D
Q
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually con铿乬urable as an input or
output.
PORTD can be con铿乬ured as an 8-bit wide micropro-
cessor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
I/O pin
(1)
CK
Data Latch
D
Q
WR
TRIS
CK
TRIS Latch
Schmitt
Trigger
input
buffer
RD TRIS
Q
D
EN
EN
RD PORT
Note 1: I/O pins have protection diodes to V
DD
and V
SS
.
TABLE 5-7:
Name
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
PORTD FUNCTIONS
Bit#
bit0
bit1
bit2
bit3
bit4
bit5
bit6
Buffer Type
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
ST/TTL
(1)
Function
Input/output port pin or parallel slave port bit0
Input/output port pin or parallel slave port bit1
Input/output port pin or parallel slave port bit2
Input/output port pin or parallel slave port bit3
Input/output port pin or parallel slave port bit4
Input/output port pin or parallel slave port bit5
Input/output port pin or parallel slave port bit6
RD7/PSP7
bit7
ST/TTL
(1)
Input/output port pin or parallel slave port bit7
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port Mode.
TABLE 5-8:
Address Name
08h
88h
89h
PORTD
TRISD
TRISE
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Bit 7
RD7
Bit 6
RD6
Bit 5
RD5
Bit 4
RD4
TRISD4
PSPMODE
Bit 3
RD3
Bit 2
RD2
Bit 1
RD1
Bit 0
RD0
Value on:
POR,
BOR
xxxx xxxx
Value on all
other resets
uuuu uuuu
1111 1111
0000 -111
TRISD7 TRISD6 TRISD5
IBF
OBF
IBOV
TRISD3 TRISD2 TRISD1 TRISD0
1111 1111
鈥?/div>
TRISE2 TRISE1 TRISE0
0000 -111
Legend:
x
= unknown,
u
= unchanged,
-
= unimplemented read as '0'. Shaded cells are not used by PORTD.
漏
1996 Microchip Technology Inc.
Preliminary
DS30559A-page 35
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