dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
TABLE 3-2:
Device
CHECKSUM COMPUTATION (CONTINUED)
Read Code
Protection
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Checksum Computation
Erased
Value
0x03BC
0x05BA
0x01BC
0x05BA
0x01BC
0x05BA
0x01BC
0x05BA
0x01BC
0x05BA
0x01BC
0x05BA
0x01BC
0x05BA
0x03BC
0x05BA
0x03BC
0x05BA
0x03BC
0x05BA
0xD60C
0x060A
0xD60C
0x060A
0xD60C
0x060A
0xD60C
0x060A
0xD60C
0x060A
0xD60C
0x060A
Value with
0xAAAAAA at 0x0
and Last
Code Address
0x01BE
0x05BA
0xFFBE
0x05BA
0xFFBE
0x05BA
0xFFBE
0x05BA
0xFFBE
0x05BA
0xFFBE
0x05BA
0xFFBE
0x05BA
0x01BE
0x05BA
0x01BE
0x05BA
0x01BE
0x05BA
0xD40E
0x060A
0xD40E
0x060A
0xD40E
0x060A
0xD40E
0x060A
0xD40E
0x060A
0xD40E
0x060A
PIC24HJ64GP510
PIC24HJ128GP206
PIC24HJ128GP210
PIC24HJ128GP306
PIC24HJ128GP310
PIC24HJ128GP506
PIC24HJ128GP510
PIC24HJ256GP206
PIC24HJ256GP210
PIC24HJ256GP610
dsPIC33FJ12GP201
dsPIC33FJ12GP202
dsPIC33FJ12MC201
dsPIC33FJ12MC202
PIC24HJ12GP201
PIC24HJ12GP202
Item Description:
CFGB + SUM(0:00ABFF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:02ABFF)
CFGB
CFGB + SUM(0:02ABFF)
CFGB
CFGB + SUM(0:02ABFF)
CFGB
CFGB + SUM(0:001FFF)
CFGB
CFGB + SUM(0:001FFF)
CFGB
CFGB + SUM(0:001FFF)
CFGB
CFGB + SUM(0:001FFF)
CFGB
CFGB + SUM(0:001FFF)
CFGB
CFGB + SUM(0:001FFF)
CFGB
SUM(a:b) = Byte sum of locations a to b inclusive (all 3 bytes of code memory)
CFGB
=
Configuration Block (masked)
= Byte sum of ((FBS & 0xCF) + (FSS & 0xFF) + (FGS & 0x07) + (FOSCSEL & 0xA7) + (FOSC & 0xE7) +
(FWDT & 0xDF) + (FPOR & 0xE7) + (FICD & 0xE3))
(for dsPIC33FJ12GP201/202, dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202)
= Byte sum of ((FBS & 0xCF) + (FSS & 0xCF) + (FGS & 0x07) + (FOSCSEL & 0xA7) + (FOSC & 0xC7) +
(FWDT & 0xDF) + (FPOR & 0xE7) + (FICD & 0xE3))
(for all other devices)
漏
2007 Microchip Technology Inc.
Preliminary
DS70152D-page 39