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dsPIC33FJ128MC706 Datasheet

  • dsPIC33FJ128MC706

  • High-Performance,16-Bit Digital Signal Controllers

  • 2439.47KB

  • 340页

  • Microchip   Microchip

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dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
In addition to code memory protection, a part of Data
RAM can be configured to be accessible only by code
resident in the Boot Segment and/or Secure Segment.
The sizes of these 鈥渞eserved鈥?sections are user-config-
urable, using the RBS<1:0> and RSS<1:0> bits.
Note:
All bits in the FBS, FSS and FGS Configu-
ration registers can only be programmed
to a value of 鈥?鈥? the
ERASEB
command is
the only way to reprogram code-protect
bits from ON (鈥?鈥? to OFF (鈥?鈥?.
3.6.5
USER UNIT ID
The dsPIC33F/PIC24H devices provide four 8-bit Con-
figuration registers (FUID0 through FUID3) for the user
to store product-specific information, such as unit serial
numbers and other product manufacturing data.
FIGURE 3-5:
CONFIGURATION BIT PROGRAMMING FLOW
Start
ConfigAddress = 0xF80000
Send
PROGC
Command
Is
PROGC
response
PASS?
Yes
Is
ConfigAddress
0xF80018?
Yes
Finish
No
ConfigAddress =
ConfigAddress + 2
No
Failure
Report Error
3.7
Exiting Enhanced ICSP Mode
FIGURE 3-6:
Exiting Program/Verify mode is done by removing V
IH
from MCLR, as shown in Figure 3-6. The only require-
ment for exit is that an interval P16 should elapse
between the last clock and program signals on PGC
and PGD before removing V
IH
.
EXITING ENHANCED
ICSP鈩?MODE
P16
P17
V
IH
MCLR
V
DD
PGD
PGC
V
IH
PGD = Input
DS70152D-page 46
Preliminary
漏
2007 Microchip Technology Inc.

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