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dsPIC33FJ128MC706 Datasheet

  • dsPIC33FJ128MC706

  • High-Performance,16-Bit Digital Signal Controllers

  • 2439.47KB

  • 340页

  • Microchip   Microchip

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dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
4.2.6
15
Opcode
N
Addr_LS
Field
Opcode
Length
N
0x1
0x3
Number of 8-bit Configuration registers
or Device ID registers to read (max of
256)
MSB of 24-bit source address
Least Significant 16 bits of 24-bit
source address
Description
Field
Opcode
Length
N
Reserved
Addr_MSB
Addr_LS
0x2
0x4
Number of 24-bit instructions to read
(max of 32768)
0x0
MSB of 24-bit source address
Least Significant 16 bits of 24-bit
source address
Description
READC
COMMAND
12 11
8 7
Length
Addr_MSB
0
4.2.7
15
Opcode
READP
COMMAND
12 11
8 7
Length
N
Reserved
Addr_LS
Addr_MSB
0
Addr_MSB
Addr_LS
The
READC
command instructs the programming exec-
utive to read N Configuration registers or Device ID
registers, starting from the 24-bit address specified by
Addr_MSB and Addr_LS. This command can only be
used to read 8-bit or 16-bit data.
When this command is used to read Configuration
registers, the upper byte in every data word returned by
the programming executive is 0x00 and the lower byte
contains the Configuration register value.
Expected Response (4 + 3 * (N 鈥?1)/2 words
for N odd):
0x1100
2+N
Configuration register or Device ID Register 1
...
Configuration register or Device ID Register N
Note:
Reading unimplemented memory will
cause the programming executive to
reset. Please ensure that only memory
locations present on a particular device
are accessed.
The
READP
command instructs the programming exec-
utive to read N 24-bit words of code memory, starting
from the 24-bit address specified by Addr_MSB and
Addr_LS. This command can only be used to read 24-
bit data. All data returned in the response to this com-
mand uses the packed data format described in
Section 4.2.2 鈥淧acked Data Format鈥?
Expected Response (2 + 3 * N/2 words for N even):
0x1200
2 + 3 * N/2
Least significant program memory word 1
...
Least significant data word N
Expected Response (4 + 3 * (N 鈥?1)/2 words
for N odd):
0x1200
4 + 3 * (N 鈥?1)/2
Least significant program memory word 1
...
MSB of program memory word N (zero padded)
Note:
Reading unimplemented memory will
cause the programming executive to
reset. Please ensure that only memory
locations present on a particular device
are accessed.
DS70152D-page 50
Preliminary
漏
2007 Microchip Technology Inc.

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