PIC16F871 Datasheet

IC型号：
PIC16F871
PDF描述：
28/40-Pin, 8-Bit CMOS FLASH Microcontrollers
文件大小：
1755.40KB
PDF页数：
172页
芯片厂家：
Microchip

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PIC16F870/871

3.0

I/O PORTS

FIGURE 3-1:

Data

Bus

Some pins for these I/O ports are multiplexed with an

alternate function for the peripheral features on the

device. In general, when a peripheral is enabled, that

pin may not be used as a general purpose I/O pin.

Additional information on I/O ports may be found in the

PICmicro鈩?/div>

Mid-Range

Reference

Manual,

(DS33023).

BLOCK DIAGRAM OF

RA3:RA0 AND RA5 PINS

Port

Data Latch

3.1

PORTA and the TRISA Register

TRIS

I/O pin

(1)

PORTA is a 6-bit wide bi-directional port. The corre-

sponding data direction register is TRISA. Setting a

TRISA bit (=1) will make the corresponding PORTA pin

an input (i.e., put the corresponding output driver in a

hi-impedance mode). Clearing a TRISA bit (=0) will

make the corresponding PORTA pin an output (i.e., put

the contents of the output latch on the selected pin).

Reading the PORTA Register reads the status of the

pins, whereas writing to it will write to the port latch. All

write operations are read-modify-write operations.

Therefore, a write to a port implies that the port pins are

read, the value is modified and then written to the port

data latch.

Pin RA4 is multiplexed with the Timer0 module clock

input to become the RA4/T0CKI pin. The RA4/T0CKI

pin is a Schmitt Trigger input and an open drain output.

All other PORTA pins have TTL input levels and full

CMOS output drivers.

Other PORTA pins are multiplexed with analog inputs

and analog V

REF

input. The operation of each pin is

selected by clearing/setting the control bits in the

ADCON1 Register (A/D Control Register1).

Note:

On a Power-on Reset, these pins are con-

figured as analog inputs and read as '0'.

TRIS Latch

Analog

Input

Mode

RD TRIS

TTL

Input

Buffer

RD PORT

To A/D Converter

Note 1:

I/O pins have protection diodes to V

and V

FIGURE 3-2:

Data

Bus

PORT

BLOCK DIAGRAM OF RA4/

T0CKI PIN

The TRISA Register controls the direction of the RA

pins, even when they are being used as analog inputs.

The user must ensure the bits in the TRISA Register

are maintained set when using them as analog inputs.

I/O pin

(1)

Data Latch

Schmitt

Trigger

Input

Buffer

EXAMPLE 3-1:

BCF

CLRF

INITIALIZING PORTA

;

Bank0

Initialize PORTA by

clearing output

data latches

Select Bank 1

Configure all pins

as digital inputs

Value used to

initialize data

direction

Set RA<3:0> as inputs

RA<5:4> as outputs

TRISA<7:6> are always

read as 鈥?鈥?

STATUS, RP0

STATUS, RP1

PORTA

TRIS

TRIS Latch

BSF

MOVLW

MOVWF

MOVLW

STATUS, RP0

0x06

ADCON1

0xCF

RD TRIS

RD PORT

MOVWF

TRISA

TMR0 clock input

Note 1:

I/O pin has protection diodes to V

only.

漏

1999 Microchip Technology Inc.

Preliminary

DS30569A-page 27

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