PIC16F870/871
9.1
USART Baud Rate Generator (BRG)
The BRG supports both the asynchronous and syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In asynchronous
mode, bit BRGH (TXSTA<2>) also controls the baud
rate. In synchronous mode, bit BRGH is ignored.
Table 9-1 shows the formula for computation of the
baud rate for different USART modes which only apply
in master mode (internal clock).
Given the desired baud rate and Fosc, the nearest inte-
ger value for the SPBRG register can be calculated
using the formula in Table 9-1. From this, the error in
baud rate can be determined.
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
OSC
/(16(X + 1)) equation can reduce the
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
9.1.1
SAMPLING
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
TABLE 9-1:
SYNC
0
1
BAUD RATE FORMULA
BRGH = 0 (Low Speed)
(Asynchronous) Baud Rate = F
OSC
/(64(X+1))
(Synchronous) Baud Rate = F
OSC
/(4(X+1))
BRGH = 1 (High Speed)
Baud Rate= F
OSC
/(16(X+1))
NA
X = value in SPBRG (0 to 255)
TABLE 9-2:
Address
98h
18h
99h
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Name
Bit 7
CSRC
SPEN
Bit 6
TX9
RX9
Bit 5
TXEN
Bit 4
SYNC
Bit 3
鈥?/div>
ADDEN
Bit 2
BRGH
FERR
Bit 1
TRMT
Bit 0
Value on:
POR,
BOR
Value on all
other
resets
TXSTA
RCSTA
TX9D
0000 -010 0000 -010
0000 0000
0000 0000
SREN CREN
OERR RX9D
0000 000x 0000 000x
SPBRG Baud Rate Generator Register
Legend:
x
= unknown,
-
= unimplemented read as '0'. Shaded cells are not used by the BRG.
漏
1999 Microchip Technology Inc.
Preliminary
DS30569A-page 65
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