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ADSP-2184N Datasheet

  • ADSP-2184N

  • Analog Devices [DSP Microcomputer]

  • 1458.04KB

  • AD

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ADSP-218xN Series
Mini-BGA Package Pinout
The Mini-BGA package pinout is shown in the illustration
below and in
Table 28.
Pin names in bold text in the table
replace the plain text named functions when Mode C = 1.
A + sign separates two functions when either function can
be active for either major I/O mode. Signals enclosed in
brackets [ ] are state bits latched from the value of the pin
at the deassertion of RESET. The multiplexed pins
DT1/FO, TFS1/IRQ1, RFS1/IRQ0, and DR1/FI, are mode
selectable by setting Bit 10 (SPORT1 configure) of the
System Control Register. If Bit 10 = 1, these pins have serial
port functionality. If Bit 10 = 0, these pins are the external
interrupt and flag pins. This bit is set to 1 by default upon
reset.
144-BALL MINI-BGA PACKAGE PINOUT (BOTTOM VIEW)
12
11
10
9
8
7
6
5
4
3
2
1
GND
GND
D22
NC
NC
NC
GND
NC
A0
GND
A1/IAD0
A2/IAD1
A
D16
D17
D18
D20
D23
V
D D E XT
GND
NC
NC
GND
A3/IAD2
A4/IAD3
B
D14
NC
D15
D19
D21
V
D D E XT
PWD
A7/IAD6
A5/IAD4
RD
A6/IAD5
PWDACK
C
GND
NC
D12
D13
NC
PF2
[M ODE C]
PF1
[M ODE B]
A9/IAD8
BGH
NC
WR
NC
D
D10
GND
V
D D E XT
GND
GND
PF3
[M ODE D]
FL 2
PF0
[M ODE A]
FL 0
A8/IAD7
V
D D E XT
V
D D E XT
E
D9
NC
D8
D11
D7 /I
WR
NC
NC
FL 1
A11/IAD10
A12/IAD11
NC
A13/IAD12
F
D4 /I
S
NC
NC
D5 /IAL
D6/IRD
NC
NC
NC
A10/IAD9
GND
NC
XT AL
G
GND
NC
GND
D3/IACK
D2/IAD15
TF S0
DT0
V
D D I N T
GND
GND
GND
CLKIN
H
V
D D INT
V
D D I N T
D1/IAD14
BG
RF S1 /IRQ0
D0/IAD13
SCLK0
V
D D E XT
V
D D E XT
NC
V
D D I NT
CL KOUT
J
EBG
BR
EBR
ERESET
SCLK1
TF S1 /
IRQ 1
RFS0
DMS
BMS
NC
NC
NC
K
EI NT
EL O UT
EL IN
RESET
GND
DR0
PM S
GND
IO M S
I RQ L 1
+ PF 6
NC
IRQ E
+ PF 4
L
ECLK
EE
EM S
NC
GND
DR1/FI
DT 1 / F O
GND
CMS
NC
IRQ 2
+ PF 7
I RQ L 0
+ PF 5
M
REV. 0
鈥?1鈥?/div>

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