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AM28F020-70JI Datasheet

  • AM28F020-70JI

  • 2 Megabit (256 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash M...

  • 278.62KB

  • AMD

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addresses and data needed for the programming and
erase operations. For system design simplification, the
Am28F020 is designed to support either WE# or CE#
controlled w rites. During a system write cycle,
addresses are latched on the falling edge of WE# or
CE#, whichever occurs last. Data is latched on the rising
edge of WE# or CE#, whichever occurs first. To simplify
discussion, the WE# pin is used as the write cycle
control pin throughout the rest of this data sheet. All
setup and hold times are with respect to the WE# signal.
AMD鈥檚 Flash technology combines years of EPROM
and EEPROM experience to produce the highest levels
of quality, reliability, and cost effectiveness. The
Am28F020 electrically erases all bits simultaneously
using Fowler-Nordheim tunneling. The bytes are pro-
grammed one byte at a time using the EPROM
programming mechanism of hot electron injection.
PRODUCT SELECTOR GUIDE
Family Part Number
Speed Options (V
CC
= 5.0 V
卤
10%)
Max Access Time (ns)
CE
#
(E
#
) Access (ns)
OE
#
(G
#
) Access (ns)
-70
70
70
35
-90
90
90
35
Am28F020
-120
120
120
50
-150
150
150
55
-200
200
200
55
BLOCK DIAGRAM
DQ0鈥揇Q7
V
CC
V
SS
V
PP
Erase
Voltage
Switch
Input/Output
Buffers
To Array
WE#
State
Control
Command
Register
CE#
OE#
Program
Voltage
Switch
Chip Enable
Output Enable
Logic
Data Latch
Program/Erase
Pulse Timer
Y-Decoder
Address Latch
Y-Gating
Low V
CC
Detector
X-Decoder
2,097,152
Bit
Cell Matrix
A0鈥揂17
14727F-1
2
Am28F020

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