鈦?/div>
2
2
LCR[1:0] word length
LCR[0]
0
1
0
1
Word length
5
6
7
8
7.6 Modem Control Register (MCR)
This register controls the interface with the modem or a peripheral device.
Table 19:
Bit
7
Modem Control Register bits description
Description
Clock select.
logic 0 = divide-by-1. The input clock (crystal or external) is divided by 16
and then presented to the Programmable Baud Rate Generator (BGR)
without further modi铿乧ation, that is, divide-by-1. (normal default condition).
logic 1 = divide-by-4. The divide-by-1 clock described in MCR[7] = a logic 0,
if further divided by four. Also see
Section 6.9 鈥淧rogrammable baud rate
generator鈥?
6
MCR[6]
IR enable.
logic 0 = enable the standard modem receive and transmit input/output
interface (normal default condition)
logic 1 = enable infrared IrDA receive and transmit inputs/outputs. While in
this mode, the TX/RX output/inputs are routed to the infrared
encoder/decoder. The data input and output levels will conform to the IrDA
infrared interface requirement. As such, while in this mode, the infrared TX
output will be a logic 0 during idle data conditions.
5
MCR[5]
Xon Any.
logic 0 = disable Xon Any function (for 16C554 compatibility) (normal default
condition)
logic 1 = enable Xon Any function. In this mode, any RX character received
will enable Xon
Symbol
MCR[7]
9397 750 14965
漏 Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 鈥?20 June 2005
31 of 58