Philips Semiconductors
SC16C654B/654DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
start
bit
data bits (0 to 7)
D0
D1
D2
D3
D4
D5
D6
D7
parity
bit
stop
bit
next
data
start
bit
RX
5 data bits
6 data bits
7 data bits
INT
t
20d
active
t
21d
active
IOR
16 baud rate clock
002aaa113
Fig 19. Receive timing
start
bit
data bits (0 to 7)
D0
D1
D2
D3
D4
D5
D6
D7
parity
bit
stop
bit
next
data
start
bit
RX
t
25d
RXRDY
active data
ready
t
26d
IOR
active
002aab063
Fig 20. Receive ready timing in non-FIFO mode
9397 750 14965
漏 Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 鈥?20 June 2005
44 of 58