Philips Semiconductors
SC16C654B/654DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
start
bit
data bits (0 to 7)
D0
D1
D2
D3
D4
D5
D6
D7
parity
bit
stop
bit
next
data
start
bit
TX
IOW
active
t
28d
D0 to D7
byte #1
t
27d
TXRDY
active transmitter
ready
002aab062
transmitter
not ready
Fig 23. Transmit ready timing in non-FIFO mode
start
bit
data bits (0 to 7)
D0
D1
D2
D3
D4
D5
D6
D7
parity
bit
stop
bit
TX
5 data bits
6 data bits
7 data bits
IOW
active
t
28d
D0 to D7
byte #16
t
27d
TXRDY
FIFO full
002aab061
Fig 24. Transmit ready timing in FIFO mode (DMA mode 鈥?鈥?
9397 750 14965
漏 Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 鈥?20 June 2005
46 of 58