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AM29DL640H90WHEN Datasheet

  • AM29DL640H90WHEN

  • 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Si...

  • 881.69KB

  • 54页

  • AMD

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For new designs, S29JL064H supersedes Am29DL640H and is the factory-recommended migration path for this
device. Please refer to the S29JL064H Datasheet for specifications and ordering information.
Am29DL640H
64 Megabit (8 M x 8-Bit/4 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
鈻?/div>
Simultaneous Read/Write operations
鈥?Data can be continuously read from one bank while
executing erase/program functions in another bank.
鈥?Zero latency between read and write operations
鈻?/div>
Flexible Bank
TM
architecture
鈥?Read may occur in any of the three banks not being
written or erased.
鈥?Four banks may be grouped by customer to achieve
desired bank divisions.
鈻?/div>
Boot Sectors
鈥?Top and bottom boot sectors in the same device
鈥?Any combination of sectors can be erased
鈻?/div>
Manufactured on 0.13 碌m process technology
鈻?/div>
Secured Silicon Sector: Extra 256 Byte sector
鈥?/div>
Factory locked and identifiable:
16 bytes available for
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function. ExpressFlash option allows entire sector to
be available for factory-secured data
鈥?/div>
Customer lockable:
One-time programmable only.
Once locked, data cannot be changed
鈻?/div>
Zero Power Operation
鈥?Sophisticated power management circuits reduce
power consumed during inactive periods to nearly
zero.
鈻?/div>
Compatible with JEDEC standards
鈥?Pinout and software compatible with
single-power-supply flash standard
鈻?/div>
Ultra low power consumption (typical values)
鈥?2 mA active read current at 1 MHz
鈥?10 mA active read current at 5 MHz
鈥?200 nA in standby or automatic sleep mode
鈻?/div>
Minimum 1 million erase cycles guaranteed per
sector
鈻?/div>
20 year data retention at 125掳C
鈥?Reliable operation for the life of the system
SOFTWARE FEATURES
鈻?/div>
Data Management Software (DMS)
鈥?AMD-supplied software manages data programming,
enabling EEPROM emulation
鈻?/div>
Supports Common Flash Memory Interface (CFI)
鈻?/div>
Erase Suspend/Erase Resume
鈥?Suspends erase operations to read data from, or
program data to, a sector that is not being erased,
then resumes the erase operation.
鈻?/div>
Data# Polling and Toggle Bits
鈥?Provides a software method of detecting the status of
program or erase cycles
鈻?/div>
Unlock Bypass Program command
鈥?Reduces overall programming time when issuing
multiple program command sequences
HARDWARE FEATURES
鈻?/div>
Ready/Busy# output (RY/BY#)
鈥?Hardware method for detecting program or erase
cycle completion
鈻?/div>
Hardware reset pin (RESET#)
鈥?Hardware method of resetting the internal state
machine to the read mode
鈻?/div>
WP#/ACC input pin
鈥?Write protect (WP#) function protects sectors 0, 1,
140, and 141, regardless of sector protect status
鈥?Acceleration (ACC) function accelerates program
timing
鈻?/div>
Sector protection
鈥?Hardware method to prevent any program or erase
operation within a sector
鈥?Temporary Sector Unprotect allows changing data in
protected sectors in-system
PACKAGE OPTIONS
鈻?/div>
63-ball Fine Pitch BGA
鈻?/div>
48-pin TSOP
PERFORMANCE CHARACTERISTICS
鈻?/div>
High performance
鈥?Access time as fast as 55 ns
鈥?Program time: 4 碌s/word typical using accelerated
programming function
Publication#
27082
Rev:
A
Amendment/6
Issue Date:
February 9, 2005
Refer to AMD鈥檚 Website (www.amd.com) for the latest information.

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