Philips Semiconductors
SC16C754B
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
6.3 Software 铿俹w control
Software 铿俹w control is enabled through the enhanced feature register and the modem
control register. Different combinations of software 铿俹w control can be enabled by setting
different combinations of EFR[3:0].
Table 3
shows software 铿俹w control options.
Table 3:
EFR[3]
0
1
0
1
X
X
X
1
0
1
0
Software 铿俹w control options (EFR[3:0])
EFR[2]
0
0
1
1
X
X
X
0
1
1
0
EFR[1]
X
X
X
X
0
1
0
1
1
1
1
EFR[0]
X
X
X
X
0
0
1
1
1
1
1
TX, RX software 铿俹w controls
no transmit 铿俹w control
transmit Xon1, Xoff1
transmit Xon2, Xoff2
transmit Xon1, Xon2, Xoff1, Xoff2
no receive 铿俹w control
receiver compares Xon1, Xoff1
receiver compares Xon2, Xoff2
transmit Xon1, Xoff1
receiver compares Xon1 or Xon2, Xoff1 or Xoff2
transmit Xon2, Xoff2
receiver compares Xon1 or Xon2, Xoff1 or Xoff2
transmit Xon1, Xon2, Xoff1, Xoff2
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
no transmit 铿俹w control
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
Remark:
When using software 铿俹w control, the Xon/Xoff characters cannot be used for
data characters.
There are two other enhanced features relating to software 铿俹w control:
鈥?/div>
Xon Any function (MCR[5]):
Operation will resume after receiving any character
after recognizing the Xoff character. It is possible that an Xon1 character is
recognized as an Xon Any character, which could cause an Xon2 character to be
written to the RX FIFO.
鈥?/div>
Special character (EFR[5]):
Incoming data is compared to Xoff2. Detection of the
special character sets the Xoff interrupt (IIR[4]) but does not halt transmission. The
Xoff interrupt is cleared by a read of the IIR. The special character is transferred to the
RX FIFO.
6.3.1 RX
When software 铿俹w control operation is enabled, the SC16C754B will compare incoming
data with Xoff1/Xoff2 programmed characters (in certain cases, Xoff1 and Xoff2 must be
received sequentially). When the correct Xoff character is received, transmission is halted
after completing transmission of the current character. Xoff detection also sets IIR[4] (if
enabled via IER[5]) and causes INT to go HIGH.
To resume transmission, an Xon1/Xon2 character must be received (in certain cases
Xon1 and Xon2 must be received sequentially). When the correct Xon characters are
received, IIR[4] is cleared, and the Xoff interrupt disappears.
9397 750 14668
漏 Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 鈥?13 June 2005
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