Philips Semiconductors
SC16C754B
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
start
bit
data bits (0 to 7)
D0
D1
D2
D3
D4
D5
D6
D7
parity
bit
stop
bit
RX
first byte that
reaches the
trigger level
t
25d
RXRDY
active data
ready
t
26d
IOR
active
002aab064
Fig 21. Receive ready timing in FIFO mode
start
bit
data bits (0 to 7)
D0
D1
D2
D3
D4
D5
D6
D7
parity
bit
stop
bit
next
data
start
bit
TX
5 data bits
6 data bits
7 data bits
INT
t
22d
t
23d
IOW
active
active
transmitter ready
t
24d
active
16 baud rate clock
002aaa116
Fig 22. Transmit timing
9397 750 14668
漏 Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 鈥?13 June 2005
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