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S25FL004D0LNAI013 Datasheet

  • S25FL004D0LNAI013

  • 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Int...

  • 792.53KB

  • 36页

  • SPANSION   SPANSION

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A d v a n c e
I n f o r m a t i o n
CS#
t
DP
0
1
2
3
4
5
6
7
SCK
Instruction
SI
Standby Mode
Deep Power Down Mode
Figure 14. Deep Power Down (DP) Instruction Sequence
Release from Deep Power Down (RES)
The Release from Deep Power Down (RES) instruction provides the only way to
exit the Deep Power Down mode. Once the device has entered the Deep Power
Down mode, all instructions are ignored except the Release from Deep Power
Down (RES) instruction. Executing this instruction takes the device out of Deep
Power Down mode.
The Release from Deep Power Down (RES) instruction is entered by driving Chip
Select (CS#) Low, followed by the instruction code on Serial Data Input (SI). Chip
Select (CS#) must be driven Low for the entire duration of the sequence.
The instruction sequence is shown in
Figure 15.
Driving Chip Select (CS#) High after the 8-bit instruction byte has been received
by the device, but before the whole of the 8-bit Electronic Signature has been
transmitted for the first time, still insures that the device is put into Standby
mode. If the device was previously in the Deep Power Down mode, though, the
transition to the Stand-by Power mode is delayed by t
RES
, and Chip Select (CS#)
must remain High for at least t
RES(max)
, as specified in Table
8.
Once in the Stand-
by Power mode, the device waits to be selected, so that it can receive, decode
and execute instructions.
June 28, 2004 S25FL004D_00A0
S25FL Family (Serial Peripheral Interface) S25FL004D
23

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