MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
FUNCTIONAL DESCRIPTION
CENTRAL PROCESSING UNIT (CPU)
The 3822 group uses the standard 740 family instruction set. Re-
fer to the table of 740 family addressing modes and machine
instructions or the 740 Family Software Manual for details on the
instruction set.
Machine-resident 740 family instructions are as follows:
The FST and SLW instruction cannot be used.
The STP, WIT, MUL, and DIV instruction can be used.
[Stack Pointer (S)]
The stack pointer is an 8-bit register used during subroutine calls
and interrupts. This register indicates start address of stored area
(stack) for storing registers during subroutine calls and interrupts.
The low-order 8 bits of the stack address are determined by the
contents of the stack pointer. The high-order 8 bits of the stack ad-
dress are determined by the stack page selection bit. If the stack
page selection bit is 鈥?鈥?, the high-order 8 bits becomes 鈥?0
16
鈥? If
the stack page selection bit is 鈥?鈥? the high-order 8 bits becomes
鈥?1
16
鈥?
The operations of pushing register contents onto the stack and
popping them from the stack are shown in Figure 10.
Store registers other than those described in Figure 10 with pro-
gram when the user needs them during interrupts or subroutine
calls.
[Accumulator (A)]
The accumulator is an 8-bit register. Data operations such as data
transfer, etc., are executed mainly through the accumulator.
[Index Register X (X)]
The index register X is an 8-bit register. In the index addressing
modes, the value of the OPERAND is added to the contents of
register X and specifies the real address.
[Program Counter (PC)]
The program counter is a 16-bit counter consisting of two 8-bit
registers PC
H
and PC
L
. It is used to indicate the address of the
next instruction to be executed.
[Index Register Y (Y)]
The index register Y is an 8-bit register. In partial instruction, the
value of the OPERAND is added to the contents of register Y and
specifies the real address.
b7
A
b7
X
b7
Y
b7
S
b15
PC
H
b7
b7
PC
L
b0
Accumulator
b0
Index register X
b0
Index register Y
b0
Stack pointer
b0
Program counter
b0
Processor status register (PS)
Carry flag
Zero flag
Interrupt disable flag
Decimal mode flag
Break flag
Index X mode flag
Overflow flag
Negative flag
N V T B D I Z C
Fig.9 740 Family CPU register structure
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