MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 31 Timing requirements 1 (Extended operating temperature version)
(V
CC
= 4.0 to 5.5 V, V
SS
= 0 V, Ta = 鈥?0 to 85 掳C, unless otherwise noted)
Symbol
t
w(RESET)
t
c(X
IN
)
t
wH(X
IN
)
t
wL(X
IN
)
t
c(CNTR)
t
wH(CNTR)
t
wL(CNTR)
t
wH(INT)
t
wL(INT)
t
c(S
CLK
)
t
wH(S
CLK
)
t
wL(S
CLK
)
t
su(R
X
D鈥揝
CLK
)
t
h(S
CLK
鈥揜
X
D)
Reset input 鈥淟鈥?pulse width
Main clock input cycle time (X
IN
input)
Main clock input 鈥淗鈥?pulse width
Main clock input 鈥淟鈥?pulse width
CNTR
0
, CNTR
1
input cycle time
CNTR
0
, CNTR
1
input 鈥淗鈥?pulse width
CNTR
0
, CNTR
1
input 鈥淟鈥?pulse width
INT
0
to INT
3
input 鈥淗鈥?pulse width
INT
0
to INT
3
input 鈥淟鈥?pulse width
Serial I/O clock input cycle time
(Note)
Serial I/O clock input 鈥淗鈥?pulse width
(Note)
Serial I/O clock input 鈥淟鈥?pulse width
(Note)
Serial I/O input set up time
Serial I/O input hold time
Parameter
Min.
2
125
45
40
250
105
105
80
80
800
370
370
220
100
Limits
Typ.
Max.
Unit
碌s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note:
When bit 6 of address 001A
16
is 鈥?鈥?(clock synchronous).
Divide this value by four when bit 6 of address 001A
16
is 鈥?鈥?(UART).
Table 32 Timing requirements 2 (Extended operating temperature version)
(V
CC
= 2.0 to 4.0 V, V
SS
= 0 V, Ta = 鈥?0 to 85 掳C, and V
CC
= 3.0 to 4.0 V, Ta = 鈥?0 to 鈥?0 掳C, unless otherwise noted)
Symbol
t
w(RESET)
t
c(X
IN
)
t
wH(X
IN
)
t
wL(X
IN
)
t
c(CNTR)
t
wH(CNTR)
t
wL(CNTR)
t
wH(INT)
t
wL(INT)
t
c(S
CLK
)
t
wH(S
CLK
)
t
wL(S
CLK
)
t
su(R
X
D鈥揝
CLK
)
t
h(S
CLK
鈥揜
X
D)
Parameter
Reset input 鈥淟鈥?pulse width
Main clock input cycle time (X
IN
input)
Main clock input 鈥淗鈥?pulse width
Main clock input 鈥淟鈥?pulse width
CNTR
0
, CNTR
1
input cycle time
CNTR
0
, CNTR
1
input 鈥淗鈥?pulse width
CNTR
0
, CNTR
1
input 鈥淟鈥?pulse width
INT
0
to INT
3
input 鈥淗鈥?pulse width
INT
0
to INT
3
input 鈥淟鈥?pulse width
Serial I/O clock input cycle time
(Note)
Serial I/O clock input 鈥淗鈥?pulse width
(Note)
Serial I/O clock input 鈥淟鈥?pulse width
(Note)
Serial I/O input set up time
Serial I/O input hold time
Limits
Min.
2
125
45
40
900/(V
CC
鈥?.4)
450/(V
CC
鈥?.4)鈥?0
450/(V
CC
鈥?.4)鈥?0
230
230
2000
950
950
400
200
Typ.
Max.
Unit
碌s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note:
When bit 6 of address 001A
16
is 鈥?鈥?(clock synchronous).
Divide this value by four when bit 6 of address 001A
16
is 鈥?鈥?(UART).
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