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M38220E1-FP Datasheet

  • M38220E1-FP

  • SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

  • 980.52KB

  • 78页

  • MITSUBISHI   MITSUBISHI

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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
b7
b0
Serial I/O status register
(SIOSTS : address 0019
16
)
Transmit buffer empty flag (TBE)
0: Buffer full
1: Buffer empty
Receive buffer full flag (RBF)
0: Buffer empty
1: Buffer full
Transmit shift register shift completion flag (TSC)
0: Transmit shift in progress
1: Transmit shift completed
Overrun error flag (OE)
0: No error
1: Overrun error
Parity error flag (PE)
0: No error
1: Parity error
Framing error flag (FE)
0: No error
1: Framing error
Summing error flag (SE)
0: (OE) U (PE) U (FE) =0
1: (OE) U (PE) U (FE) =1
Not used (returns 鈥?鈥?when read)
b7
b0
Serial I/O control register
(SIOCON : address 001A
16
)
BRG count source selection bit (CSS)
0: f(X
IN
) (f(X
CIN
) in low-speed mode)
1: f(X
IN
)/4 (f(X
CIN
)/4 in low-speed mode)
Serial I/O synchronization clock selection bit (SCS)
0: BRG output divided by 4 when clock synchronized serial
I/O is selected.
BRG output divided by 16 when UART is selected.
1: External clock input when clock synchronized serial I/O is
selected.
External clock input divided by 16 when UART is selected.
S
RDY
output enable bit (SRDY)
0: P4
7
pin operates as ordinary I/O pin
1: P4
7
pin operates as S
RDY
output pin
Transmit interrupt source selection bit (TIC)
0: Interrupt when transmit buffer has emptied
1: Interrupt when transmit shift operation is completed
Transmit enable bit (TE)
0: Transmit disabled
1: Transmit enabled
Receive enable bit (RE)
0: Receive disabled
1: Receive enabled
Serial I/O mode selection bit (SIOM)
0: Asynchronous serial I/O (UART)
1: Clock synchronous serial I/O
Serial I/O enable bit (SIOE)
0: Serial I/O disabled
(pins P4
4
鈥揚4
7
operate as ordinary I/O pins)
1: Serial I/O enabled
(pins P4
4
鈥揚4
7
operate as serial I/O pins)
b7
b0
UART control regi ster
(UART CON : address 001B
16
)
Character length selection bit (CHAS)
0: 8 bits
1: 7 bits
Parity enable bit (PARE)
0: Parity checking disabled
1: Parity checking enabled
Parity selection bit (PARS)
0: Even parity
1: Odd parity
Stop bit length selection bit (STPS)
0: 1 stop bit
1: 2 stop bits
P4
5
/T
X
D P-channel output disable bit (POFF)
0: CMOS output (in output mode)
1: N-channel open-drain output (in output mode)
Not used (return 鈥?鈥?when read)
Fig. 29 Structure of serial I/O control registers
32

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