MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 23 Switching characteristics 1 (Standard, One Time PROM version)
(V
CC
= 4.0 to 5.5 V, V
SS
= 0 V, Ta = 鈥?0 to 85 掳C, unless otherwise noted)
Symbol
t
wH(S
CLK
)
t
wL(S
CLK
)
t
d(S
CLK
鈥揟
X
D)
t
v(S
CLK
鈥揟
X
D)
t
r(S
CLK
)
t
f(S
CLK
)
t
r(CMOS)
t
f(CMOS)
Parameter
Serial I/O clock output 鈥淗鈥?pulse width
Serial I/O clock output 鈥淟鈥?pulse width
Serial I/O output delay time
(Note 1)
Serial I/O output valid time
(Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time
(Note 2)
CMOS output falling time
(Note 2)
Limits
Min.
t
C
(S
CLK
)/2鈥?0
t
C
(S
CLK
)/2鈥?0
鈥?0
30
10
10
30
30
30
Typ.
Max.
Unit
ns
ns
140
ns
ns
ns
ns
ns
ns
Notes 1:
When the P4
5
/T
X
D P-channel output disable bit of the UART control register (bit 4 of address 001B
16
) is 鈥?鈥?
2:
X
OUT
and X
COUT
pins are excluded.
Table 24 Switching characteristics 2 (Standard, One Time PROM version)
(V
CC
= 2.5 to 4.0 V, V
SS
= 0 V, Ta = 鈥?0 to 85 掳C, unless otherwise noted)
Symbol
t
wH(S
CLK
)
twL(S
CLK
)
Parameter
Serial I/O clock output 鈥淗鈥?pulse width
Serial I/O clock output 鈥淟鈥?pulse width
Serial I/O output delay time
(Note 1)
Serial I/O output valid time
(Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time
(Note 2)
CMOS output falling time
(Note 2)
Limits
Min.
t
C
(S
CLK
)/2鈥?0
t
C
(S
CLK
)/2鈥?0
鈥?0
50
20
20
50
50
50
Typ.
Max.
Unit
ns
t
d(S
CLK
鈥揟
X
D)
t
v(S
CLK
鈥揟
X
D)
t
r(S
CLK
)
t
f(S
CLK
)
t
r(CMOS)
t
f(CMOS)
350
ns
ns
ns
ns
ns
ns
ns
Notes 1:
When the P4
5
/T
X
D P-channel output disable bit of the UART control register (bit 4 of address 001B
16
) is 鈥?鈥?
2:
X
OUT
and X
COUT
pins are excluded.
53