97SD3232RPME Datasheet

  • 97SD3232RPME

  • 1 Gb SDRAM 8-Meg X 32 Bit X 4-Banks

  • 745.01KB

  • 39页

  • MAXWELL

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1 Gb (8-Meg X 32-Bit X 4-Banks) SDRAM
DQM Truth Table
C
OMMAND
Byte (DQ0 to DQ31) write enable/output
enable
Byte (DQ0 to DQ31) write inhibit/output dis-
able
S
YMBOL
ENB
MASK
CKE =
N
-1
H
H
CKE =
N
x
x
97SD3232
DQM
L
H
Note: H: V
IH
L: V
IL
x V
IH
or V
IL
Write: I
DID
is Needed
Read: I
DOD
is Needed
The SDRAM can mask input/output data by means of DQM.
During reading, the output buffer is set to Low-Z by setting DQM to Low, enabling data output. On the other
hand, when DQM is set High, the output buffer becomes High-Z, disabling data output.
Memory
During writing, data is written by setting DQM to Low. When DQM is set to High, the previous data is held
( the new data is not written). Desired data can be masked during burst read or burst write by setting DQM..
For more details, refer to the DQM control section of the SDRAM operating instructions.
CKE Truth Table
C
URRENT
S
TATE
Active
Any
Clock Suspend
Idle
Idle
Idle
Power down entry
Self Refresh
Power down
Power down exit
Self Refresh exit (SELFX)
C
OMMAND
Clock suspended mode entry
Clock Suspend
Clock Suspend mode exit
Auto-refresh command (REF)
Self-refresh entry (SELF)
N
-1
N
CS
x
x
x
L
L
L
HL
L
L
H
RAS
x
x
x
L
L
H
x
H
H
x
CAS
x
x
x
L
L
H
x
H
H
x
WE
x
x
x
H
H
H
x
H
H
x
A
DDRESS
x
x
x
x
x
x
x
x
x
x
H
L
L
H
H
H
H
L
L
L
L
L
H
H
L
L
L
H
H
H
Note: H:V
IH
L:V
IL
x V
IH
or V
IL
01.11.05 Rev 2
All data sheets are subject to change without notice
10
漏2005 Maxwell Technologies
All rights reserved.

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