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97SD3232RPME Datasheet

  • 97SD3232RPME

  • 1 Gb SDRAM 8-Meg X 32 Bit X 4-Banks

  • 745.01KB

  • 39页

  • MAXWELL

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1 Gb (8-Meg X 32-Bit X 4-Banks) SDRAM
T
ABLE
5. AC Electrical Characteristics
97SD3232
M
IN
10
7.5
T
YPICAL
M
AX
U
NIT
ns
(V
CC
=3.3V + 0.3V, V
CC
Q = 3.3V + 0.3V, T
A
= -55
TO
125掳C,
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
System clock cycle time
1
(CAS latency = 2)
(CAS latency = 3)
CLK high pulse width
1,7
CLK low pulse width
1,7,
Access time from CLK
1,2
(CAS latency = 2)
(CAS latency = 3)
Data-out hold time
1,2,3
CLK to Data-out low impedance
1,2,3,7
CLK to Data-out high impedance
1,47,
(CAS latency = 2, 3)
Input setup time
1,5,6
CKE setup time for power down exit
1
Input hold time
1,6
Ref/Active to Ref/Active command period
1
Active to Precharge command period
1
Active command to column command
1
(same bank)
Precharge to Active command period
1
Write recovery or data-in to precharge lead time
1
Active( a) to Active (b) command period
1
Transition time(rise and fall)
7
Refresh Period
S
YMBOL
t
CK
S
UBGROUPS
9, 10, 11
t
CKH
t
CKL
t
AC
9, 10, 11
9, 10, 11
9, 10, 11
2.5
2.5
6
6
ns
ns
ns
t
OH
t
LZ
t
HZ
t
AS
, t
CS,
t
DS
, t
CES
t
CESP
t
AH
, t
CH
, t
DH
t
CEH
t
RC
t
RAS
t
RCD
t
RP
t
DPL
t
RRD
t
T
t
REF
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
@ 105 掳C
@ 85 掳C
2.7
2
5.4
1.5
1.5
1.5
70
50
20
20
20
20
1
16
32
64
5
6.4
16
8
120000
ns
ns
ns
ns
Memory
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
@ 70 掳C
128
1. AC measurement assumes t
T
=1ns. Reference level for timing of input signals is 1.5V.
2. Access time is measured at 1.5V.
3. t
LZ
(min) definesthe time at which the outputs achieve the low impedance state.
4. t
HZ
(min) defines the time at which the outputs achieve the high impedance state.
5. tCES defines CKE setup time to CLK rising edge except for the power down exit command.
6. t
AS
/t
AH
: Address, t
CS
/t
CH
: /RAS, /CAS, /WE, DQM
7. Guarenteed by design (Not tested).
8. Guarenteed by Device Charactreization Testing. (Not 100% Tested)
01.11.05 Rev 2
All data sheets are subject to change without notice
5
漏2005 Maxwell Technologies
All rights reserved.

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