鈥?/div>
2.5
2.5
卤200
Timing
Diagram
Reference
Figure 4
Parameter
Internal CPU pipeline clock
1
CLKP
2,3,4
Symbol
Frequency
Frequency
Tperiod1
Thigh1
Tlow1
Trise1
Tfall1
Tjitter
Reference
Edge
none
none
Units
MHz
MHz
ns
ns
ns
ns
ns
ps
1
The CPU pipeline clock speed is selected during cold reset by the boot configuration vector (see Table 2).
3
USB clock (USBCLKP) frequency must be less than CLKP frequency.
4
ATM Utopia clock (RXCLKP and TXCLKP) frequency must
2
Ethernet clock (MIIRXCLKP and MIITXCLKP) frequency must be equal to or less than 1/2 CLKP frequency.
be equal to or less than 1/2 CLKP frequency.
Table 3 Clock Parameters
Tlow1
Tperiod1
CLKP
Tjitter
Tjitter
Trise1
Tfall1
Thigh1
Figure 4 Clock Parameters Waveform
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May 25, 2004