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IDT79RC32T355-150DH Datasheet

  • IDT79RC32T355-150DH

  • IDT Interprise Integrated Communications Processor

  • 991.93KB

  • 47页

  • IDT

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IDT 79RC32355
USB
鈥?Revision 1.1 compliant
鈥?USB slave device controller
鈥?Supports a 6
th
USB endpoint
鈥?Full speed operation at 12 Mb/s
鈥?Supports control, interrupt, bulk and isochronous endpoints
鈥?Supports USB remote wakeup
鈥?Integrated USB transceiver
鈼?/div>
TDM
鈥?Serial Time Division Multiplexed (TDM) voice and data inter-
face
鈥?Provides interface to telephone CODECs and DSPs
鈥?Interface to high quality audio A/Ds and D/As with external
glue logic
鈥?Support 1 to 128 8-bit time slots
鈥?Compatible with Lucent CHI, GCI, Mitel ST-bus, K2 and SLD
busses
鈥?Supports data rates of up to 8.192 Mb/s
鈥?Supports internal or external frame generation
鈥?Supports multiple non-contiguous active input and output time
slots
鈼?/div>
EJTAG
鈥?Run-time Mode provides a standard JTAG interface
鈥?Real-Time Mode provides additional pins for real-time trace
information
鈼?/div>
Ethernet
鈥?Full duplex support for 10 and 100 Mb/s Ethernet
鈥?IEEE 802.3u compatible Media Independent Interface (MII)
with serial management interface
鈥?IEEE 802.3u auto-negotiation for automatic speed selection
鈥?Flexible address filtering modes
鈥?64-entry hash table based multicast address filtering
鈼?/div>
ATM SAR
鈥?Can be configured as one UTOPIA level 1 interface or 1
UTOPIA level 2 interface with 2 address lines (3 PHYs max)
鈥?Supports 25Mb/s and faster ATM
鈥?Supports UTOPIA data path interface operation at speeds up
to 33 MHz
鈥?Supports standard 53-byte ATM cells
鈥?Performs HEC generation and checking
鈥?Cell processing discards short cells and clips long cells
鈥?16 cells worth of buffering
鈥?UTOPIA modes: 8 cell input buffer and 8 cell output buffer
鈥?Hardware support for CRC-32 generation and checking for
AAL5
鈥?Hardware support for CRC-10 generation and checking
鈥?Virtual caching receive mechanism supports reception of any
length packet without CPU intervention on up to eight simulta-
neously active receive channels
鈥?Frame Mode transmit mechanism supports transmission of
any length packet without CPU intervention
鈼?/div>
System Features
鈥?JTAG Interface (IEEE Std. 1149.1 compatible)
鈥?208 pin PQFP package
鈥?2.5V core supply and 3.3V I/O supply
鈥?Up to 180 MHz pipeline frequency and up to 75 MHz bus
frequency
鈼?/div>
RC32300 CPU Core
Debug port
Timers
UART
Interrupt Ctl
DMA
Channels
USB to PC
Echo
Codec
SLIC
USB
TDM
Data Buffers
SDRAM Ctl
Memory &
I/O Controller
ATM I/F
Ethernet MAC
MII I/F
Ethernet Transceiver
POTS telephone
RJ11
Ethernet to PC
Clock
32-bit Data Bus
SDRAM
Memory & I/O
Transmission
Convergence
Data Pump
AFE
Figure 2 Example of xDSL Residential Gateway Using RC32355
2 of 47
May 25, 2004

IDT79RC32T355-150DH 产品属性

  • 24

  • 集成电路 (IC)

  • 嵌入式 - 微处理器

  • Interprise™

  • RISC 32-位

  • -

  • 150MHz

  • 2.5V

  • 表面贴装

  • 208-BFQFP

  • 208-PQFP（28x28）

  • 托盘

  • 79RC32T355-150DH

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