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H8/3690 Datasheet

  • H8/3690

  • 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Seri...

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  • 432页

  • RENESAS

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Figure 14.7 Example SCI3 Operation in Reception in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit)............................................................................ 199
Figure 14.8 Sample Serial Data Reception Flowchart (Asynchronous mode) (1)...................... 201
Figure 14.8 Sample Serial Reception Data Flowchart (2) .......................................................... 202
Figure 14.9 Data Format in Clocked Synchronous Communication .......................................... 203
Figure 14.10 Example of SCI3 Operation in Transmission in Clocked Synchronous Mode...... 204
Figure 14.11 Sample Serial Transmission Flowchart (Clocked Synchronous Mode) ................ 205
Figure 14.12 Example of SCI3 Reception Operation in Clocked Synchronous Mode............... 206
Figure 14.13 Sample Serial Reception Flowchart (Clocked Synchronous Mode)...................... 207
Figure 14.14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
(Clocked Synchronous Mode) ............................................................................... 209
Figure 14.15 Example of Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A)........................................... 211
Figure 14.16 Sample Multiprocessor Serial Transmission Flowchart ........................................ 212
Figure 14.17 Sample Multiprocessor Serial Reception Flowchart (1)........................................ 213
Figure 14.17 Sample Multiprocessor Serial Reception Flowchart (2)........................................ 214
Figure 14.18 Example of SCI3 Operation in Reception Using Multiprocessor Format
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit) .............................. 215
Figure 14.19 Receive Data Sampling Timing in Asynchronous Mode ...................................... 218
Section 15 I
2
C Bus Interface 2 (IIC2)
Figure 15.1 Block Diagram of I
2
C Bus Interface 2..................................................................... 220
Figure 15.2 External Circuit Connections of I/O Pins ................................................................ 221
Figure 15.3 I
2
C Bus Formats ...................................................................................................... 233
Figure 15.4 I
2
C Bus Timing........................................................................................................ 233
Figure 15.5 Master Transmit Mode Operation Timing (1)......................................................... 235
Figure 15.6 Master Transmit Mode Operation Timing (2)......................................................... 235
Figure 15.7 Master Receive Mode Operation Timing (1) .......................................................... 237
Figure 15.8 Master Receive Mode Operation Timing (2) .......................................................... 237
Figure 15.9 Slave Transmit Mode Operation Timing (1) ........................................................... 239
Figure 15.10 Slave Transmit Mode Operation Timing (2) ......................................................... 240
Figure 15.11 Slave Receive Mode Operation Timing (1)........................................................... 241
Figure 15.12 Slave Receive Mode Operation Timing (2)........................................................... 241
Figure 15.13 Clocked Synchronous Serial Transfer Format....................................................... 242
Figure 15.14 Transmit Mode Operation Timing......................................................................... 243
Figure 15.15 Receive Mode Operation Timing .......................................................................... 244
Figure 15.16 Block Diagram of Noise Conceler ........................................................................ 244
Figure 15.17 Sample Flowchart for Master Transmit Mode ...................................................... 245
Figure 15.18 Sample Flowchart for Master Receive Mode ........................................................ 246
Figure 15.19 Sample Flowchart for Slave Transmit Mode......................................................... 247
Figure 15.20 Sample Flowchart for Slave Receive Mode .......................................................... 248
Figure 15.21 The Timing of the Bit Synchronous Circuit .......................................................... 250
Rev. 4.00, 03/04, page xxii of xxviii

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