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AM29LV320MB100E Datasheet

  • AM29LV320MB100E

  • 32 Megabit (2 M x 16-Bit/4 M x 8-Bit) MirrorBit 3.0 Volt-onl...

  • 1335.99KB

  • 61页

  • AMD

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D A T A S H E E T
WRITE OPERATION STATUS
The device provides several bits to determine the status of
a program or erase operation: DQ2, DQ3, DQ5, DQ6, and
DQ7.
Table 14
and the following subsections describe the
function of these bits. DQ7 and DQ6 each offer a method
for determining whether a program or erase operation is
complete or in progress. The device also provides a
hardware-based output signal, RY/BY#, to determine
whether an Embedded Program or Erase operation is
in progress or has been completed.
valid data, the data outputs on DQ0鈥揇Q6 may be still
invalid. Valid data on DQ0鈥揇Q7 will appear on suc-
cessive read cycles.
Table 14
shows the outputs for Data# Polling on DQ7.
Figure 8 shows the Data# Polling algorithm. Figure 20
in the
AC Characteristics
section shows the Data#
Polling timing diagram.
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host system
whether an Embedded Program or Erase algorithm is in
progress or completed, or whether the device is in Erase
Suspend. Data# Polling is valid after the rising edge of the
final WE# pulse in the command sequence.
During the Embedded Program algorithm, the device out-
puts on DQ7 the complement of the datum programmed to
DQ7. This DQ7 status also applies to programming during
Erase Suspend. When the Embedded Program algorithm is
complete, the device outputs the datum programmed to
DQ7. The system must provide the program address to
read valid status information on DQ7. If a program address
falls within a protected sector, Data# Polling on DQ7 is ac-
tive for approximately 1 碌s, then the device returns to the
read mode.
During the Embedded Erase algorithm, Data# Polling
produces a 鈥?鈥?on DQ7. When the Embedded Erase
algorithm is complete, or if the device enters the Erase
Suspend mode, Data# Polling produces a 鈥?鈥?on DQ7.
The system must provide an address within any of the
sectors selected for erasure to read valid status infor-
mation on DQ7.
After an erase command sequence is written, if all
sectors selected for erasing are protected, Data# Poll-
ing on DQ7 is active for approximately 100 碌s, then
the device returns to the read mode. If not all selected
sectors are protected, the Embedded Erase algorithm
erases the unprotected sectors, and ignores the se-
lected sectors that are protected. However, if the sys-
tem reads DQ7 at an address within a protected
sector, the status may not be valid.
Just prior to the completion of an Embedded Program
or Erase operation, DQ7 may change asynchronously
with DQ0鈥揇Q6 while Output Enable (OE#) is asserted
low. That is, the device may change from providing
status information to valid data on DQ7. Depending on
when the system samples the DQ7 output, it may read
the status or valid data. Even if the device has com-
pleted the program or erase operation and DQ7 has
START
Read DQ7鈥揇Q0
Addr = VA
DQ7 = Data?
Yes
No
No
DQ5 = 1?
Yes
Read DQ7鈥揇Q0
Addr = VA
DQ7 = Data?
Yes
No
FAIL
PASS
Notes:
1. VA = Valid address for programming. During a sector
erase operation, a valid address is any sector address
within the sector being erased. During chip erase, a
valid address is any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = 鈥?鈥?because
DQ7 may change simultaneously with DQ5.
Figure 8.
Data# Polling Algorithm
34
Am29LV320MT/B
May 16, 2003

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