D A T A S H E E T
Command Definitions
Table 12.
Cycles
Command Sequence
(Notes)
Read (Note 5)
Reset (Note 6)
Autoselect (Note 7)
Manufacturer ID
Device ID (Note 8)
SecSi铮?Sector Factory Protect
(Note 9)
Sector Group Protect Verify
(Note 10)
Command Definitions (x16 Mode, BYTE# = V
IH
)
Bus Cycles (Notes 1鈥?)
First
Second
Addr
Data
Third
Addr
Data
Fourth
Addr
Data
Fifth
Addr
Data
Sixth
Addr
Data
Addr
RA
XXX
555
555
555
555
555
555
555
555
SA
555
555
XXX
XXX
555
555
BA
BA
55
Data
RD
F0
AA
AA
AA
AA
AA
AA
AA
AA
29
AA
AA
A0
90
AA
AA
B0
30
98
1
1
4
6
4
4
3
4
4
6
1
3
3
2
2
6
6
1
1
1
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
PA
XXX
2AA
2AA
55
55
55
55
55
55
55
55
55
55
PD
00
55
55
555
555
555
555
555
555
555
SA
555
555
90
90
90
90
88
90
A0
25
F0
20
X00
X01
X03
(SA)X02
0001
227E
(Note 9)
00/01
X0E
221A
X0F
2200/
2201
Enter SecSi Sector Region
Exit SecSi Sector Region
Program
Write to Buffer (Note 11)
Program Buffer to Flash
Write to Buffer Abort Reset (Note 12)
Unlock Bypass
Unlock Bypass Program (Note 13)
Unlock Bypass Reset (Note 14)
Chip Erase
Sector Erase
Program/Erase Suspend (Note 15)
Program/Erase Resume (Note 16)
CFI Query (Note 17)
XXX
PA
SA
00
PD
WC
PA
PD
WBL
PD
555
555
80
80
555
555
AA
AA
2AA
2AA
55
55
555
SA
10
30
Legend:
X = Don鈥檛 care
RA = Read Address of the memory location to be read.
RD = Read Data read from location RA during read operation.
PA = Program Address . Addresses latch on the falling edge of the
WE# or CE# pulse, whichever happens later.
PD = Program Data for location PA. Data latches on the rising edge of
WE# or CE# pulse, whichever happens first.
Notes:
1. See
Table 1
for description of bus operations.
2. All values are in hexadecimal.
3.
4.
Except for the read cycle and the fourth cycle of the autoselect
command sequence, all bus cycles are write cycles.
During unlock cycles, when lower address bits are 555 or 2AAh
as shown in table, address bits higher than A11 (except where BA
is required) and data bits higher than DQ7 are don鈥檛 cares.
No unlock or command cycles required when device is in read
mode.
The Reset command is required to return to the read mode (or to
the erase-suspend-read mode if previously in Erase Suspend)
when the device is in the autoselect mode, or if DQ5 goes high
while the device is providing status information.
The fourth cycle of the autoselect command sequence is a read
cycle. Data bits DQ15鈥揇Q8 are don鈥檛 care. See the
Autoselect
Command Sequence
section for more information.
The device ID must be read in three cycles. The data is 2201h for
top boot and 2200h for bottom boot.
If WP# protects the top two address sectors, the data is 98h for
factory locked and 18h for not factory locked. If WP# protects the
SA = Sector Address of sector to be verified (in autoselect mode) or
erased. Address bits A20鈥揂15 uniquely select any sector.
WBL = Write Buffer Location. Address must be within the same write
buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
bottom two address sectors, the data is 88h for factory locked and
08h for not factor locked.
10. The data is 00h for an unprotected sector group and 01h for a
protected sector group.
11. The total number of cycles in the command sequence is
determined by the number of words written to the write buffer. The
maximum number of cycles in the command sequence is 21.
12. Command sequence resets device for next command after
aborted write-to-buffer operation.
13. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
14. The Unlock Bypass Reset command is required to return to the
read mode when the device is in the unlock bypass mode.
15. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation.
16. The Erase Resume command is valid only during the Erase
Suspend mode.
17. Command is valid when device is ready to read array data or when
device is in autoselect mode.
5.
6.
7.
8.
9.
32
Am29LV320MT/B
May 16, 2003