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EDX5116ABSE-3B-E Datasheet

  • EDX5116ABSE-3B-E

  • 512M bits XDR DRAM (32M words ?16 bits)

  • 3580.77KB

  • 78页

  • ELPIDA

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EDX5116ABSE
Figure 24
7
Refresh High (REFH) Row Register
6
5
4
3
2
1
0
reserved
R[18:16]
Refresh High Row Register
SADR[7:0]: 00001001
2
Read/write register
REFH[7:0] resets to 00000000
2
reserved - Refresh row field.
This field contains the high-order bits of the row address that will
be refreshed during the next refresh interval. This row address
will be incremented after a REFI command for auto-refresh, or
when the BANK[2:0] field for the REFB register equals the max-
imum bank address for self-refresh.
Figure 25
7
Refresh Middle (REFM) Row Register
6
5
4
3
2
1
0
reserved
R[11:8]
Refresh Middle Row Register
SADR[7:0]: 00001010
2
Read/write register
REFM[7:0] resets to 00000000
2
R[11:8] - Refresh row field.
This field contains the middle-order bits of the row address that
will be refreshed during the next refresh interval. This row
address will be incremented after a REFI command for auto-
refresh, or when the BANK[2:0] field for the REFB register
equals the maximum bank address for self-refresh.
Figure 26
7
Refresh Low (REFL) Row Register
6
5
4
3
2
1
0
R[7:0]
Refresh Low Row Register
SADR[7:0]: 00001011
2
Read/write register
REFL[7:0] resets to 00000000
2
R[7:0] - Refresh row field.
This field contains the low-order bits of the row address that will
be refreshed during the next refresh interval. This row address
will be incremented after a REFI command for auto-refresh, or
when the BANK[2:0] field for the REFB register equals the max-
imum bank address for self-refresh.
Figure 27
7
IO Configuration (IOCFG) Register
6
5
4
3
2
1
0
reserved
ODF[1:0]
IO Configuration Register
SADR[7:0]: 00001111
2
Read/write register
IOCFG[7:0] resets to 00000000
2
ODF[1:0] - Overdrive Function field.
00 - Nominal V
OSW,DQ
range
01 - reserved
10 - reserved
11 - reserved
Preliminary Data Sheet E0643E30 (Ver. 3.0)
37

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