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74HCT125N Datasheet

  • 74HCT125N

  • Quad buffer/line driver; 3-state

  • 56.06KB

  • PHILIPS

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Philips Semiconductors
Product speci铿乧ation
Quad buffer/line driver; 3-state
FEATURES
鈥?/div>
Output capability: bus driver
鈥?/div>
I
CC
category: MSI
GENERAL DESCRIPTION
74HC/HCT125
The 74HC/HCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT125 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled
by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a HIGH impedance OFF-state.
The 鈥?25鈥?is identical to the 鈥?26鈥?but has active LOW enable inputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
掳C;
t
r
= t
f
= 6 ns
TYPICAL
SYMBOL
t
PHL
/ t
PLH
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
碌W):
P
D
= C
PD
脳
V
CC2
脳
f
i
+
鈭?/div>
(C
L
脳
V
CC2
脳
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
鈭?/div>
(C
L
脳
V
CC2
脳
f
o
) = sum of outputs
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
鈭?/div>
1.5 V
ORDERING INFORMATION
See
鈥?4HC/HCT/HCU/HCMOS Logic Package Information鈥?
PARAMETER
propagation delay nA to nY
input capacitance
power dissipation capacitance per buffer
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
9
3.5
22
12
3.5
24
HCT
ns
pF
pF
UNIT
December 1990
2

74HCT125N 产品属性

  • NXP

  • 缓冲器和线路驱动器

  • 4

  • 4

  • Non-Inverting

  • 5.5 V

  • 4.5 V

  • + 125 C

  • Through Hole

  • PDIP-14

  • Tube

  • - 6 mA

  • HCT

  • CMOS

  • 6 mA

  • - 40 C

  • 4

  • 3-State

  • 25 ns at 4.5 V

  • 25

  • 74HCT125N,652

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