Philips Semiconductors
Product specification
Presettable synchronous 4-bit binary counter;
asynchronous reset
74LVC161
PIN CONFIGURATION
MR
CP
D0
D1
D2
D3
CEP
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
TC
Q0
Q1
Q2
Q3
CET
PE
PIN DESCRIPTION
PIN NUMBER
1
2
3,4,5,6
7
8
9
10
14,13,12,11
SYMBOL
MR
CP
D
0
to D
3
CEP
GND
PE
CET
Q
0
to Q
3
TC
V
CC
FUNCTION
asynchronous master
reset (active LOW)
clock input (LOW-to-HIGH,
edge-triggered)
data inputs
count enable inputs
ground (0V)
parallel enable input
(active LOW)
count enable carry input
flip-flop outputs
terminal count output
positive supply voltage
SF00656
LOGIC SYMBOL
15
15
16
LOGIC SYMBOL (IEEE/IEC)
1
Q
0
Q
1
Q
2
Q
3
14
13
12
11
9
7
10
2
R
M1
G3
G4
C2 /1,3,4+
CTR4
TC
3
4
5
6
9
D
0
D
1
D
2
D
3
PE
CEP CET
CP
MR
3
4
1,2 D
14
13
12
11
15
7
10
2
1
5
6
4 CT=15
V
CC
= Pin 16
GND = Pin 8
SY00065
SY00066
1998 May 20
3