HIN230 thru HIN241
VOLTAGE DOUBLER
S1
V
CC
+
-
GND
S3
RC
OSCILLATOR
C1-
C1
+
-
S4
C3
V
CC
GND
S7
+
-
C2
-
C2
+
-
S8
C4
V- = -(V+)
C1
+
S2
V+ = 2V
CC
S5
VOLTAGE INVERTER
C2
+
S6
GND
FIGURE 1. CHARGE PUMP
Detailed Description
The HIN230 thru HIN241 family of RS-232
transmitters/receivers are powered by a single +5V power
supply (except HIN231 and HIN239), feature low power
consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, transmitter, and receiver.
Charge Pump
An equivalent circuit of the charge pump is illustrated in Figure
1. The charge pump contains two sections: the voltage
doubler and the voltage inverter. Each section is driven by a
two phase, internally generated clock to generate +10V and -
10V. The nominal clock frequency is 16kHz. During phase one
of the clock, capacitor C1 is charged to V
CC
. During phase
two, the voltage on C1 is added to V
CC
, producing a signal
across C3 equal to twice V
CC
. During phase one, C2 is also
charged to 2V
CC
, and then during phase two, it is inverted
with respect to ground to produce a signal across C4 equal to
-2V
CC
. The charge pump accepts input voltages up to 5.5V.
The output impedance of the voltage doubler section (V+) is
approximately 200鈩? and the output impedance of the voltage
inverter section (V-) is approximately 450鈩? A typical
application uses 1碌F capacitors for C1-C4, however, the value
is not critical. Increasing the values of C1 and C2 will lower the
output impedance of the voltage doubler and inverter,
increasing the values of the reservoir capacitors, C3 and C4,
lowers the ripple on the V+ and V- supplies.
During shutdown mode (HIN230, 235, 236, 240 and 241),
SHUTDOWN control line set to logic 鈥?鈥? the charge pump is
turned off, V+ is pulled down to V
CC
, V- is pulled up to GND,
and the supply current is reduced to less than 10碌A. The
transmitter outputs are disabled and the receiver outputs are
placed in the high impedance state.
resistor so any unused input can be left unconnected and its
output remains in its low state. The output voltage swing meets
the RS-232C specifications of
卤5V
minimum with the worst
case conditions of: all transmitters driving 3k鈩?minimum load
impedance, V
CC
= 4.5V, and maximum allowable operating
temperature. The transmitters have an internally limited output
slew rate which is less than 30V/碌s. The outputs are short
circuit protected and can be shorted to ground indefinitely. The
powered down output impedance is a minimum of 300鈩?with
卤2V
applied to the outputs and V
CC
= 0V.
V+
V
CC
400k鈩?/div>
T
XIN
GND < T
XIN
< V
CC
V-
300鈩?/div>
T
OUT
V- < V
TOUT
< V+
FIGURE 2. TRANSMITTER
Receivers
The receiver inputs accept up to
卤30V
while presenting the
required 3k鈩?to 7k鈩?input impedance even if the power is off
(V
CC
= 0V). The receivers have a typical input threshold of
1.3V which is within the
卤3V
limits, known as the transition
region, of the RS-232 speci铿乧ations. The receiver output is
0V to V
CC
. The output will be low whenever the input is
greater than 2.4V and high whenever the input is 铿俹ating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis to improve noise rejection. The receiver Enable
line EN, when set to logic 鈥?鈥? (HIN235, 236, 239, 240, and
241) disables the receiver outputs, placing them in the high
impedance mode. The receiver outputs are also placed in
the high impedance state when in shutdown mode.
V
CC
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic
threshold is about 26% of V
CC
, or 1.3V for V
CC
= 5V. A logic 1
at the input results in a voltage of between -5V and V- at the
output, and a logic 0 results in a voltage between +5V and (V+ -
0.6V). Each transmitter input has an internal 400k鈩?pullup
R
XIN
-30V < R
XIN
< +30V
GND
5k鈩?/div>
R
OUT
GND < V
ROUT
< V
CC
FIGURE 3. RECEIVER
3-11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
