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PIC16C620A Datasheet

  • PIC16C620A

  • EPROM-Based 8-Bit CMOS Microcontrollers

  • 2148.47KB

  • 128页

  • Microchip

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PIC16C62X
5.2
PORTB and TRISB Registers
PORTB is an 8-bit wide bi-directional port. The
corresponding data direction register is TRISB. A '1' in
the TRISB register puts the corresponding output driver
in a high impedance mode. A '0' in the TRISB register
puts the contents of the output latch on the selected
pin(s).
Reading PORTB register reads the status of the pins,
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. So a write
to a port implies that the port pins are 铿乺st read, then
this value is modi铿乪d and written to the port data latch.
Each of the PORTB pins has a weak internal pull-up
(鈮?00
碌A
typical). A single control bit can turn on all the
pull-ups. This is done by clearing the RBPU
(OPTION<7>) bit. The weak pull-up is automatically
turned off when the port pin is con铿乬ured as an output.
The pull-ups are disabled on Power-on Reset.
Four of PORTB鈥檚 pins, RB7:RB4, have an interrupt on
change feature. Only pins con铿乬ured as inputs can
cause this interrupt to occur (i.e., any RB7:RB4 pin
con铿乬ured as an output is excluded from the interrupt
on change comparison). The input pins (of RB7:RB4)
are compared with the old value latched on the last
read of PORTB. The 鈥渕ismatch鈥?outputs of RB7:RB4
are OR鈥檈d together to generate the RBIF interrupt (铿俛g
latched in INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the
interrupt in the following manner:
a)
b)
Any read or write of PORTB. This will end the
mismatch condition.
Clear 铿俛g bit RBIF.
A mismatch condition will continue to set 铿俛g bit RBIF.
Reading PORTB will end the mismatch condition, and
allow 铿俛g bit RBIF to be cleared.
This interrupt on mismatch feature, together with
software con铿乬urable pull-ups on these four pins allow
easy interface to a key pad and make it possible for
wake-up on key-depression. (See AN552 in the
Microchip
Embedded Control Handbook.)
Note:
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RBIF inter-
rupt 铿俛g may not get set.
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
FIGURE 5-6:
BLOCK DIAGRAM OF
RB3:RB0 PINS
V
DD
weak
P pull-up
Data Latch
D
Q
CK Q
D
Q
CK Q
I/O
pin
(1)
FIGURE 5-5:
BLOCK DIAGRAM OF
RB7:RB4 PINS
V
DD
weak
P pull-up
Data Latch
D
Q
CK Q
TRIS Latch
D
Q
I/O
pin
(1)
RBPU
(2)
Data bus
WR PortB
RBPU
(2)
Data bus
WR PortB
WR TRISB
TTL
Input
Buffer
WR TRISB
CK Q
TTL
Input
Buffer
RD TRISB
ST
Buffer
RD PortB
Q
EN
D
RD TRISB
Q
RD PortB
Set RBIF
From other
RB7:RB4 pins
Latch
D
RB0/INT
EN
ST
Buffer
RD Port
Q
EN
D
Note 1: I/O pins have diode protection to V
DD
and V
SS
.
Note 2: TRISB = 1 enables weak pull-up if RBPU = '0'
(OPTION<7>).
RD Port
RB7:RB6 in serial programming mode
Note 1: I/O pins have diode protection to V
DD
and V
SS
.
Note 2: TRISB = 1 enables weak pull-up if RBPU = '0'
(OPTION<7>).
DS30235G-page 28
Preliminary
漏
1998 Microchip Technology Inc.

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