QS5919T70Q Datasheet

IC型号：
QS5919T70Q
PDF描述：
LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
文件大小：
132.38KB
PDF页数：
9页
芯片厂家：
IDT

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QS5919T

LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER

INDUSTRIAL TEMPERATURE RANGE

AC TIMING DIAGRAM

SYN C

FEEDBACK

SK F

-Q

S KR

Q /2

2xQ

SKA LL

NOTES:

1. AC Timing Diagram applies to Q output connected to FEEDBACK and

= GND. For

= V

, the negative edge of FEEDBACK aligns with the

negative edge of SYNC input, and the negative edges of the multiplied and divided outputs align with the negative edge of SYNC.

2. All parameters are measured at 1.5V.

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