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TPS72501
TPS72515, TPS72516
TPS72518, TPS72525
SLVS341D 鈥?MAY 2002 鈥?REVISED MARCH 2004
PACKAGE DISSIPATION RATINGS
PACKAGE
DDPAK
SOT223
D-8
(1)
(2)
BOARD
High K
(1)
Low K
(2)
High K
(1)
R
胃JC
2
掳C/W
15
掳C/W
39.4
掳C/W
R
胃JA
23
掳C/W
53
掳C/W
55
掳C/W
The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), multilayer board with 1 ounce
internal power and ground planes and 2 ounce copper traces on top and bottom of the board.
The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), two-layer board with 2 ounce
copper traces on top of the board.
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range V
I
= V
O(typ)
+ 1 V, I
O
= 1 mA, EN = IN, C
o
= 1 碌F, C
i
= 1 碌F (unless
otherwise noted)
PARAMETER
Bandgap voltage reference
TPS72501
Adjustable
TPS72515
TPS72516
TPS72518
TPS72525
I
Ground current
Standby current
V
n
PSRR
Output noise voltage
Ripple rejection
Current limit
(2)
Output voltage line regulation
(鈭哣
O
/V
O
)
(3)
Output voltage load regulation
V
IH
V
IL
I
I
I
(FB)
EN high level
input
(2)
EN = 0 V or V
I
TPS72501
V
CC
rising
T
J
= 25掳C, V
CC
rising
T
J
= 25掳C, V
CC
rising
T
J
= 25掳C, V
CC
rising
V
(FB)
= 1.22
-100
1.45
1.57
50
10
100
EN low level input
(2)
EN input current
Feedback current
UVLO threshold
UVLO hysteresis
UVLO deglitch
UVLO delay
(1)
(2)
(3)
V
O
+ 1 V < V
I
鈮?/div>
5.5 V
0 碌A < I
O
< 1 A
0 碌A < I
O
< 1 A
(1)
T
J
= 25掳C
0 碌A< I
O
< 1 A
T
J
= 25掳C
0 碌A < I
O
< 1 A
T
J
= 25掳C
0 碌A < I
O
< 1 A
T
J
= 25掳C
0 碌A < I
O
< 1 A
I
O
= 0 碌A
I
O
= 1 A
EN < 0.4 V
EN < 0.4 V
BW = 200 Hz to 100 kHz,
T
J
= 25掳C
f = 1 kHz, C
o
= 10 碌F
C
o
= 10 碌F, I
O
= 1
mA
T
J
= 25掳C
1.1
-0.15
-0.25
1.3
-0.2
0.01
0.4
100
100
1.70
150
60
1.6
0.02
0.05
2.3
0.15
0.25
T
J
= 25掳C
3.5 V
鈮?/div>
V
I
鈮?/div>
5.5 V
2.45
75
210
0.2
1
2.8 V
鈮?/div>
V
I
鈮?/div>
5.5 V
1.764
2.5
2.55
120
300
碌A
碌A
碌V
dB
A
%/V
%/A
V
nA
nA
V
mV
碌s
碌s
2.6 V
鈮?/div>
V
I
鈮?/div>
5.5 V
1.568
1.8
1.836
1.8 V
鈮?/div>
V
I
鈮?/div>
5.5 V
1.47
1.6
1.632
V
1.22 V
鈮?/div>
V
O
鈮?/div>
5.5 V
TEST CONDITIONS
MIN
1.177
0.965 V
O
1.5
1.53
TYP
1.220
MAX
1.263
1.035 V
O
UNIT
V
V
O
Output voltage
Minimum IN operating voltage used for testing is V
O(typ)
+ 1 V.
Test condition includes output voltage V
O
= V
O
- 15% and pulse duration = 10 ms.
V
Imin
= (V
O
+ 1) or 1.8 V whichever is greater.
V
Line regulation (mV)
+
% V
O
5.5 V
*
V
100
Imin
1000
3
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